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Searched refs:xvabsdp (Results 1 – 11 of 11) sorted by relevance

/external/llvm/test/CodeGen/PowerPC/
Dvec_abs.ll63 ; CHECK: xvabsdp
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dvec_abs.ll63 ; CHECK: xvabsdp
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dvsx.s215 # CHECK-BE: xvabsdp 7, 27 # encoding: [0xf0,0xe0,0xdf,0x64]
216 # CHECK-LE: xvabsdp 7, 27 # encoding: [0x64,0xdf,0xe0,0xf0]
217 xvabsdp 7, 27
/external/llvm/test/MC/PowerPC/
Dvsx.s215 # CHECK-BE: xvabsdp 7, 27 # encoding: [0xf0,0xe0,0xdf,0x64]
216 # CHECK-LE: xvabsdp 7, 27 # encoding: [0x64,0xdf,0xe0,0xf0]
217 xvabsdp 7, 27
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dvsx.txt210 # CHECK: xvabsdp 7, 27
/external/llvm/test/MC/Disassembler/PowerPC/
Dvsx.txt210 # CHECK: xvabsdp 7, 27
/external/v8/src/codegen/ppc/
Dconstants-ppc.h364 V(xvabsdp, XVABSDP, 0xF0000764) \
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc2917 __ xvabsdp(i.OutputSimd128Register(), i.InputSimd128Register(0)); in AssembleArchInstruction() local
/external/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td505 "xvabsdp $XT, $XB", IIC_VecFP,
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc4382 "sxsigdp\010xsxsigqp\007xvabsdp\007xvabssp\007xvadddp\007xvaddsp\txvcmpe"
6820 …{ 13318 /* xvabsdp */, PPC::XVABSDP, Convert__RegVSRC1_0__RegVSRC1_1, 0, { MCK_RegVSRC, MCK_RegVSR…
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td549 "xvabsdp $XT, $XB", IIC_VecFP,