Home
last modified time | relevance | path

Searched refs:xvabssp (Results 1 – 11 of 11) sorted by relevance

/external/llvm/test/CodeGen/PowerPC/
Dvec_abs.ll20 ; CHECK: xvabssp
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dvec_abs.ll20 ; CHECK: xvabssp
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dvsx.s218 # CHECK-BE: xvabssp 7, 27 # encoding: [0xf0,0xe0,0xde,0x64]
219 # CHECK-LE: xvabssp 7, 27 # encoding: [0x64,0xde,0xe0,0xf0]
220 xvabssp 7, 27
/external/llvm/test/MC/PowerPC/
Dvsx.s218 # CHECK-BE: xvabssp 7, 27 # encoding: [0xf0,0xe0,0xde,0x64]
219 # CHECK-LE: xvabssp 7, 27 # encoding: [0x64,0xde,0xe0,0xf0]
220 xvabssp 7, 27
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dvsx.txt213 # CHECK: xvabssp 7, 27
/external/llvm/test/MC/Disassembler/PowerPC/
Dvsx.txt213 # CHECK: xvabssp 7, 27
/external/v8/src/codegen/ppc/
Dconstants-ppc.h370 V(xvabssp, XVABSSP, 0xF0000664) \
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc2929 __ xvabssp(i.OutputSimd128Register(), i.InputSimd128Register(0)); in AssembleArchInstruction() local
/external/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td510 "xvabssp $XT, $XB", IIC_VecFP,
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc4382 "sxsigdp\010xsxsigqp\007xvabsdp\007xvabssp\007xvadddp\007xvaddsp\txvcmpe"
6821 …{ 13326 /* xvabssp */, PPC::XVABSSP, Convert__RegVSRC1_0__RegVSRC1_1, 0, { MCK_RegVSRC, MCK_RegVSR…
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td554 "xvabssp $XT, $XB", IIC_VecFP,