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Searched refs:xvadddp (Results 1 – 18 of 18) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dvsx-args.ll22 ; CHECK: xvadddp 34, 34, [[VC]]
32 ; CHECK-FISL: xvadddp 34, 34, [[VC]]
Dswaps-le-3.ll22 ; CHECK: xvadddp
Dswaps-le-7.ll17 ; CHECK-DAG: xvadddp
Dvsx.ll55 ; CHECK: xvadddp 34, 34, 35
59 ; CHECK-LE: xvadddp 34, 34, 35
Dvsx-p9.ll140 ; CHECK: xvadddp 0, 0, 1
/external/llvm/test/CodeGen/PowerPC/
Dswaps-le-3.ll22 ; CHECK: xvadddp
Dvsx-args.ll21 ; CHECK: xvadddp 34, 34, [[VC]]
Dswaps-le-7.ll18 ; CHECK-NEXT: xvadddp
Dvsx.ll55 ; CHECK: xvadddp 34, 34, 35
59 ; CHECK-LE: xvadddp 34, 34, 35
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dvsx.s221 # CHECK-BE: xvadddp 7, 63, 27 # encoding: [0xf0,0xff,0xdb,0x04]
222 # CHECK-LE: xvadddp 7, 63, 27 # encoding: [0x04,0xdb,0xff,0xf0]
223 xvadddp 7, 63, 27
/external/llvm/test/MC/PowerPC/
Dvsx.s221 # CHECK-BE: xvadddp 7, 63, 27 # encoding: [0xf0,0xff,0xdb,0x04]
222 # CHECK-LE: xvadddp 7, 63, 27 # encoding: [0x04,0xdb,0xff,0xf0]
223 xvadddp 7, 63, 27
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dvsx.txt216 # CHECK: xvadddp 7, 63, 27
/external/llvm/test/MC/Disassembler/PowerPC/
Dvsx.txt216 # CHECK: xvadddp 7, 63, 27
/external/v8/src/codegen/ppc/
Dconstants-ppc.h204 V(xvadddp, XVADDDP, 0xF0000300) \
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc2394 __ xvadddp(i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction() local
/external/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td155 "xvadddp $XT, $XA, $XB", IIC_VecFP,
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc4382 "sxsigdp\010xsxsigqp\007xvabsdp\007xvabssp\007xvadddp\007xvaddsp\txvcmpe"
6822 …{ 13334 /* xvadddp */, PPC::XVADDDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, 0, { MCK_RegVSRC…
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td199 "xvadddp $XT, $XA, $XB", IIC_VecFP,