/external/llvm/test/CodeGen/PowerPC/ |
D | builtins-ppc-elf2-abi.ll | 106 %2 = call <4 x i32> @llvm.ppc.vsx.xvcmpgesp(<4 x float> %0, <4 x float> %1) 110 ; CHECK: xvcmpgesp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 189 declare <4 x i32> @llvm.ppc.vsx.xvcmpgesp(<4 x float>, <4 x float>)
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
D | builtins-ppc-elf2-abi.ll | 106 %2 = call <4 x i32> @llvm.ppc.vsx.xvcmpgesp(<4 x float> %0, <4 x float> %1) 110 ; CHECK: xvcmpgesp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 263 declare <4 x i32> @llvm.ppc.vsx.xvcmpgesp(<4 x float>, <4 x float>)
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
D | vsx.s | 245 # CHECK-BE: xvcmpgesp 7, 63, 27 # encoding: [0xf0,0xff,0xda,0x9c] 246 # CHECK-LE: xvcmpgesp 7, 63, 27 # encoding: [0x9c,0xda,0xff,0xf0] 247 xvcmpgesp 7, 63, 27 248 # CHECK-BE: xvcmpgesp. 7, 63, 27 # encoding: [0xf0,0xff,0xde,0x9c] 249 # CHECK-LE: xvcmpgesp. 7, 63, 27 # encoding: [0x9c,0xde,0xff,0xf0] 250 xvcmpgesp. 7, 63, 27
|
/external/llvm/test/MC/PowerPC/ |
D | vsx.s | 245 # CHECK-BE: xvcmpgesp 7, 63, 27 # encoding: [0xf0,0xff,0xda,0x9c] 246 # CHECK-LE: xvcmpgesp 7, 63, 27 # encoding: [0x9c,0xda,0xff,0xf0] 247 xvcmpgesp 7, 63, 27 248 # CHECK-BE: xvcmpgesp. 7, 63, 27 # encoding: [0xf0,0xff,0xde,0x9c] 249 # CHECK-LE: xvcmpgesp. 7, 63, 27 # encoding: [0x9c,0xde,0xff,0xf0] 250 xvcmpgesp. 7, 63, 27
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
D | vsx.txt | 240 # CHECK: xvcmpgesp 7, 63, 27 243 # CHECK: xvcmpgesp. 7, 63, 27
|
/external/llvm/test/MC/Disassembler/PowerPC/ |
D | vsx.txt | 240 # CHECK: xvcmpgesp 7, 63, 27 243 # CHECK: xvcmpgesp. 7, 63, 27
|
/external/llvm/include/llvm/IR/ |
D | IntrinsicsPowerPC.td | 729 PowerPC_VSX_Intrinsic<"xvcmpgesp", [llvm_v4i32_ty],
|
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/ |
D | IntrinsicsPowerPC.td | 845 PowerPC_VSX_Intrinsic<"xvcmpgesp", [llvm_v4i32_ty],
|
/external/v8/src/codegen/ppc/ |
D | constants-ppc.h | 221 V(xvcmpgesp, XVCMPGESP, 0xF0000298) \
|
/external/v8/src/compiler/backend/ppc/ |
D | code-generator-ppc.cc | 2705 __ xvcmpgesp(i.OutputSimd128Register(), i.InputSimd128Register(1), in AssembleArchInstruction() local
|
/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrVSX.td | 476 "xvcmpgesp", "$XT, $XA, $XB", IIC_VecFPCompare,
|
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/ |
D | PPCGenAsmMatcher.inc | 6830 …{ 13380 /* xvcmpgesp */, PPC::XVCMPGESP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, 0, { MCK_Reg… 6831 …{ 13380 /* xvcmpgesp */, PPC::XVCMPGESPo, Convert__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, 0, { MCK__D…
|
/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/ |
D | IntrinsicEnums.inc | 5098 ppc_vsx_xvcmpgesp, // llvm.ppc.vsx.xvcmpgesp 5099 ppc_vsx_xvcmpgesp_p, // llvm.ppc.vsx.xvcmpgesp.p
|
D | IntrinsicImpl.inc | 5124 "llvm.ppc.vsx.xvcmpgesp", 5125 "llvm.ppc.vsx.xvcmpgesp.p", 14002 1, // llvm.ppc.vsx.xvcmpgesp 14003 1, // llvm.ppc.vsx.xvcmpgesp.p
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCInstrVSX.td | 520 "xvcmpgesp", "$XT, $XA, $XB", IIC_VecFPCompare,
|
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
D | Intrinsics.gen | 4147 ppc_vsx_xvcmpgesp, // llvm.ppc.vsx.xvcmpgesp 4148 ppc_vsx_xvcmpgesp_p, // llvm.ppc.vsx.xvcmpgesp.p 10171 "llvm.ppc.vsx.xvcmpgesp", 10172 "llvm.ppc.vsx.xvcmpgesp.p", 18056 1, // llvm.ppc.vsx.xvcmpgesp 18057 1, // llvm.ppc.vsx.xvcmpgesp.p
|
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
D | Intrinsics.gen | 4153 ppc_vsx_xvcmpgesp, // llvm.ppc.vsx.xvcmpgesp 4154 ppc_vsx_xvcmpgesp_p, // llvm.ppc.vsx.xvcmpgesp.p 10211 "llvm.ppc.vsx.xvcmpgesp", 10212 "llvm.ppc.vsx.xvcmpgesp.p", 18151 1, // llvm.ppc.vsx.xvcmpgesp 18152 1, // llvm.ppc.vsx.xvcmpgesp.p
|
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/ |
D | Intrinsics.gen | 4153 ppc_vsx_xvcmpgesp, // llvm.ppc.vsx.xvcmpgesp 4154 ppc_vsx_xvcmpgesp_p, // llvm.ppc.vsx.xvcmpgesp.p 10211 "llvm.ppc.vsx.xvcmpgesp", 10212 "llvm.ppc.vsx.xvcmpgesp.p", 18151 1, // llvm.ppc.vsx.xvcmpgesp 18152 1, // llvm.ppc.vsx.xvcmpgesp.p
|
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
D | Intrinsics.gen | 4153 ppc_vsx_xvcmpgesp, // llvm.ppc.vsx.xvcmpgesp 4154 ppc_vsx_xvcmpgesp_p, // llvm.ppc.vsx.xvcmpgesp.p 10211 "llvm.ppc.vsx.xvcmpgesp", 10212 "llvm.ppc.vsx.xvcmpgesp.p", 18151 1, // llvm.ppc.vsx.xvcmpgesp 18152 1, // llvm.ppc.vsx.xvcmpgesp.p
|
/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/ |
D | Intrinsics.gen | 4153 ppc_vsx_xvcmpgesp, // llvm.ppc.vsx.xvcmpgesp 4154 ppc_vsx_xvcmpgesp_p, // llvm.ppc.vsx.xvcmpgesp.p 10211 "llvm.ppc.vsx.xvcmpgesp", 10212 "llvm.ppc.vsx.xvcmpgesp.p", 18151 1, // llvm.ppc.vsx.xvcmpgesp 18152 1, // llvm.ppc.vsx.xvcmpgesp.p
|