/external/llvm/test/CodeGen/PowerPC/ |
D | builtins-ppc-elf2-abi.ll | 130 %2 = call <4 x i32> @llvm.ppc.vsx.xvcmpgtsp(<4 x float> %0, <4 x float> %1) 134 ; CHECK: xvcmpgtsp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 195 declare <4 x i32> @llvm.ppc.vsx.xvcmpgtsp(<4 x float>, <4 x float>)
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
D | builtins-ppc-elf2-abi.ll | 130 %2 = call <4 x i32> @llvm.ppc.vsx.xvcmpgtsp(<4 x float> %0, <4 x float> %1) 134 ; CHECK: xvcmpgtsp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 269 declare <4 x i32> @llvm.ppc.vsx.xvcmpgtsp(<4 x float>, <4 x float>)
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
D | vsx.s | 257 # CHECK-BE: xvcmpgtsp 7, 63, 27 # encoding: [0xf0,0xff,0xda,0x5c] 258 # CHECK-LE: xvcmpgtsp 7, 63, 27 # encoding: [0x5c,0xda,0xff,0xf0] 259 xvcmpgtsp 7, 63, 27 260 # CHECK-BE: xvcmpgtsp. 7, 63, 27 # encoding: [0xf0,0xff,0xde,0x5c] 261 # CHECK-LE: xvcmpgtsp. 7, 63, 27 # encoding: [0x5c,0xde,0xff,0xf0] 262 xvcmpgtsp. 7, 63, 27
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/external/llvm/test/MC/PowerPC/ |
D | vsx.s | 257 # CHECK-BE: xvcmpgtsp 7, 63, 27 # encoding: [0xf0,0xff,0xda,0x5c] 258 # CHECK-LE: xvcmpgtsp 7, 63, 27 # encoding: [0x5c,0xda,0xff,0xf0] 259 xvcmpgtsp 7, 63, 27 260 # CHECK-BE: xvcmpgtsp. 7, 63, 27 # encoding: [0xf0,0xff,0xde,0x5c] 261 # CHECK-LE: xvcmpgtsp. 7, 63, 27 # encoding: [0x5c,0xde,0xff,0xf0] 262 xvcmpgtsp. 7, 63, 27
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
D | vsx.txt | 252 # CHECK: xvcmpgtsp 7, 63, 27 255 # CHECK: xvcmpgtsp. 7, 63, 27
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/external/llvm/test/MC/Disassembler/PowerPC/ |
D | vsx.txt | 252 # CHECK: xvcmpgtsp 7, 63, 27 255 # CHECK: xvcmpgtsp. 7, 63, 27
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/external/llvm/include/llvm/IR/ |
D | IntrinsicsPowerPC.td | 741 PowerPC_VSX_Intrinsic<"xvcmpgtsp", [llvm_v4i32_ty],
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/ |
D | IntrinsicsPowerPC.td | 857 PowerPC_VSX_Intrinsic<"xvcmpgtsp", [llvm_v4i32_ty],
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/external/v8/src/codegen/ppc/ |
D | constants-ppc.h | 230 V(xvcmpgtsp, XVCMPGTSP, 0xF0000258) \
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/external/v8/src/compiler/backend/ppc/ |
D | code-generator-ppc.cc | 2700 __ xvcmpgtsp(i.OutputSimd128Register(), i.InputSimd128Register(1), in AssembleArchInstruction() local
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrVSX.td | 482 "xvcmpgtsp", "$XT, $XA, $XB", IIC_VecFPCompare,
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/ |
D | PPCGenAsmMatcher.inc | 6834 …{ 13400 /* xvcmpgtsp */, PPC::XVCMPGTSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, 0, { MCK_Reg… 6835 …{ 13400 /* xvcmpgtsp */, PPC::XVCMPGTSPo, Convert__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, 0, { MCK__D…
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/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/ |
D | IntrinsicEnums.inc | 5102 ppc_vsx_xvcmpgtsp, // llvm.ppc.vsx.xvcmpgtsp 5103 ppc_vsx_xvcmpgtsp_p, // llvm.ppc.vsx.xvcmpgtsp.p
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D | IntrinsicImpl.inc | 5128 "llvm.ppc.vsx.xvcmpgtsp", 5129 "llvm.ppc.vsx.xvcmpgtsp.p", 14006 1, // llvm.ppc.vsx.xvcmpgtsp 14007 1, // llvm.ppc.vsx.xvcmpgtsp.p
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCInstrVSX.td | 526 "xvcmpgtsp", "$XT, $XA, $XB", IIC_VecFPCompare,
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/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
D | Intrinsics.gen | 4151 ppc_vsx_xvcmpgtsp, // llvm.ppc.vsx.xvcmpgtsp 4152 ppc_vsx_xvcmpgtsp_p, // llvm.ppc.vsx.xvcmpgtsp.p 10175 "llvm.ppc.vsx.xvcmpgtsp", 10176 "llvm.ppc.vsx.xvcmpgtsp.p", 18060 1, // llvm.ppc.vsx.xvcmpgtsp 18061 1, // llvm.ppc.vsx.xvcmpgtsp.p
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/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
D | Intrinsics.gen | 4157 ppc_vsx_xvcmpgtsp, // llvm.ppc.vsx.xvcmpgtsp 4158 ppc_vsx_xvcmpgtsp_p, // llvm.ppc.vsx.xvcmpgtsp.p 10215 "llvm.ppc.vsx.xvcmpgtsp", 10216 "llvm.ppc.vsx.xvcmpgtsp.p", 18155 1, // llvm.ppc.vsx.xvcmpgtsp 18156 1, // llvm.ppc.vsx.xvcmpgtsp.p
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/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/ |
D | Intrinsics.gen | 4157 ppc_vsx_xvcmpgtsp, // llvm.ppc.vsx.xvcmpgtsp 4158 ppc_vsx_xvcmpgtsp_p, // llvm.ppc.vsx.xvcmpgtsp.p 10215 "llvm.ppc.vsx.xvcmpgtsp", 10216 "llvm.ppc.vsx.xvcmpgtsp.p", 18155 1, // llvm.ppc.vsx.xvcmpgtsp 18156 1, // llvm.ppc.vsx.xvcmpgtsp.p
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/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
D | Intrinsics.gen | 4157 ppc_vsx_xvcmpgtsp, // llvm.ppc.vsx.xvcmpgtsp 4158 ppc_vsx_xvcmpgtsp_p, // llvm.ppc.vsx.xvcmpgtsp.p 10215 "llvm.ppc.vsx.xvcmpgtsp", 10216 "llvm.ppc.vsx.xvcmpgtsp.p", 18155 1, // llvm.ppc.vsx.xvcmpgtsp 18156 1, // llvm.ppc.vsx.xvcmpgtsp.p
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/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/ |
D | Intrinsics.gen | 4157 ppc_vsx_xvcmpgtsp, // llvm.ppc.vsx.xvcmpgtsp 4158 ppc_vsx_xvcmpgtsp_p, // llvm.ppc.vsx.xvcmpgtsp.p 10215 "llvm.ppc.vsx.xvcmpgtsp", 10216 "llvm.ppc.vsx.xvcmpgtsp.p", 18155 1, // llvm.ppc.vsx.xvcmpgtsp 18156 1, // llvm.ppc.vsx.xvcmpgtsp.p
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