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Searched refs:xvcvspsxws (Results 1 – 10 of 10) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dbuild-vector-tests.ll122 ;// P8: 2 x xxmrghd, 2 x xvcvspsxws, vmrgew //
123 ;// P9: 2 x xxmrghd, 2 x xvcvspsxws, vmrgew //
132 ;// P8: lxvd2x, xxswapd, xvcvspsxws //
133 ;// P9: lxvx, xvcvspsxws //
137 ;// P8: 2 x lxvd2x, 2 x xxswapd, vperm, xvcvspsxws //
138 ;// P9: 2 x lxvx, vperm, xvcvspsxws //
142 ;// P8: 4 x lxsspx, 2 x xxmrghd, 2 x xvcvspsxws, vmrgew //
143 ;// P9: 4 x lxssp, 2 x xxmrghd, 2 x xvcvspsxws, vmrgew //
149 ;// P8: 4 x lxsspx, 2 x xxmrghd, 2 x xvcvspsxws, vmrgew //
150 ;// P9: 4 x lxssp, 2 x xxmrghd, 2 x xvcvspsxws, vmrgew //
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dvsx.s290 # CHECK-BE: xvcvspsxws 7, 27 # encoding: [0xf0,0xe0,0xda,0x60]
291 # CHECK-LE: xvcvspsxws 7, 27 # encoding: [0x60,0xda,0xe0,0xf0]
292 xvcvspsxws 7, 27
/external/llvm/test/MC/PowerPC/
Dvsx.s290 # CHECK-BE: xvcvspsxws 7, 27 # encoding: [0xf0,0xe0,0xda,0x60]
291 # CHECK-LE: xvcvspsxws 7, 27 # encoding: [0x60,0xda,0xe0,0xf0]
292 xvcvspsxws 7, 27
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dvsx.txt285 # CHECK: xvcvspsxws 7, 27
/external/llvm/test/MC/Disassembler/PowerPC/
Dvsx.txt285 # CHECK: xvcvspsxws 7, 27
/external/v8/src/codegen/ppc/
Dconstants-ppc.h381 V(xvcvspsxws, XVCVSPSXWS, 0xF0000260) \
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc3077 __ xvcvspsxws(i.OutputSimd128Register(), kScratchDoubleReg); in AssembleArchInstruction() local
/external/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td598 "xvcvspsxws $XT, $XB", IIC_VecFP, []>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td666 "xvcvspsxws $XT, $XB", IIC_VecFP,
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc6847 …{ 13521 /* xvcvspsxws */, PPC::XVCVSPSXWS, Convert__RegVSRC1_0__RegVSRC1_1, 0, { MCK_RegVSRC, MCK_…