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Searched refs:xvcvuxwsp (Results 1 – 9 of 9) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dvsx.s320 # CHECK-BE: xvcvuxwsp 7, 27 # encoding: [0xf0,0xe0,0xda,0xa0]
321 # CHECK-LE: xvcvuxwsp 7, 27 # encoding: [0xa0,0xda,0xe0,0xf0]
322 xvcvuxwsp 7, 27
/external/llvm/test/MC/PowerPC/
Dvsx.s320 # CHECK-BE: xvcvuxwsp 7, 27 # encoding: [0xf0,0xe0,0xda,0xa0]
321 # CHECK-LE: xvcvuxwsp 7, 27 # encoding: [0xa0,0xda,0xe0,0xf0]
322 xvcvuxwsp 7, 27
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dvsx.txt315 # CHECK: xvcvuxwsp 7, 27
/external/llvm/test/MC/Disassembler/PowerPC/
Dvsx.txt315 # CHECK: xvcvuxwsp 7, 27
/external/v8/src/codegen/ppc/
Dconstants-ppc.h388 V(xvcvuxwsp, XVCVUXWSP, 0xF00002A0) \
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc3089 __ xvcvuxwsp(i.OutputSimd128Register(), i.InputSimd128Register(0)); in AssembleArchInstruction() local
/external/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td631 "xvcvuxwsp $XT, $XB", IIC_VecFP, []>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td705 "xvcvuxwsp $XT, $XB", IIC_VecFP,
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc6857 …{ 13624 /* xvcvuxwsp */, PPC::XVCVUXWSP, Convert__RegVSRC1_0__RegVSRC1_1, 0, { MCK_RegVSRC, MCK_Re…