Home
last modified time | relevance | path

Searched refs:xvmindp (Results 1 – 22 of 22) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dvsx-minmax.ll41 %12 = tail call <2 x double> @llvm.ppc.vsx.xvmindp(<2 x double> %11, <2 x double> %11)
42 ; CHECK: xvmindp
69 declare <2 x double> @llvm.ppc.vsx.xvmindp(<2 x double>, <2 x double>)
/external/llvm/test/CodeGen/PowerPC/
Dvsx-minmax.ll41 %12 = tail call <2 x double> @llvm.ppc.vsx.xvmindp(<2 x double> %11, <2 x double> %11)
42 ; CHECK: xvmindp
69 declare <2 x double> @llvm.ppc.vsx.xvmindp(<2 x double>, <2 x double>)
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dvsx.s347 # CHECK-BE: xvmindp 7, 63, 27 # encoding: [0xf0,0xff,0xdf,0x44]
348 # CHECK-LE: xvmindp 7, 63, 27 # encoding: [0x44,0xdf,0xff,0xf0]
349 xvmindp 7, 63, 27
/external/llvm/test/MC/PowerPC/
Dvsx.s347 # CHECK-BE: xvmindp 7, 63, 27 # encoding: [0xf0,0xff,0xdf,0x44]
348 # CHECK-LE: xvmindp 7, 63, 27 # encoding: [0x44,0xdf,0xff,0xf0]
349 xvmindp 7, 63, 27
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DREADME_ALTIVEC.txt311 - Min and max (xsmaxdp, xsmindp, xvmaxdp, xvmindp, xvmaxsp, xvminsp)
DPPCInstrVSX.td792 "xvmindp $XT, $XA, $XB", IIC_VecFP,
/external/llvm/lib/Target/PowerPC/
DREADME_ALTIVEC.txt311 - Min and max (xsmaxdp, xsmindp, xvmaxdp, xvmindp, xvmaxsp, xvminsp)
DPPCInstrVSX.td717 "xvmindp $XT, $XA, $XB", IIC_VecFP,
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dvsx.txt342 # CHECK: xvmindp 7, 63, 27
/external/llvm/test/MC/Disassembler/PowerPC/
Dvsx.txt342 # CHECK: xvmindp 7, 63, 27
/external/llvm/include/llvm/IR/
DIntrinsicsPowerPC.td683 def int_ppc_vsx_xvmindp : PowerPC_VSX_Vec_DDD_Intrinsic<"xvmindp">;
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/
DIntrinsicsPowerPC.td799 def int_ppc_vsx_xvmindp : PowerPC_VSX_Vec_DDD_Intrinsic<"xvmindp">;
/external/v8/src/codegen/ppc/
Dconstants-ppc.h254 V(xvmindp, XVMINDP, 0xF0000740) \
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc3323 __ xvmindp(kScratchDoubleReg, i.InputSimd128Register(0), in AssembleArchInstruction() local
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc4389 "xvmindp\007xvminsp\007xvmovdp\007xvmovsp\txvmsubadp\txvmsubasp\txvmsubm"
6868 …{ 13724 /* xvmindp */, PPC::XVMINDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, 0, { MCK_RegVSRC…
/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/
DIntrinsicEnums.inc5120 ppc_vsx_xvmindp, // llvm.ppc.vsx.xvmindp
DIntrinsicImpl.inc5146 "llvm.ppc.vsx.xvmindp",
14024 1, // llvm.ppc.vsx.xvmindp
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen4169 ppc_vsx_xvmindp, // llvm.ppc.vsx.xvmindp
10193 "llvm.ppc.vsx.xvmindp",
18078 1, // llvm.ppc.vsx.xvmindp
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen4175 ppc_vsx_xvmindp, // llvm.ppc.vsx.xvmindp
10233 "llvm.ppc.vsx.xvmindp",
18173 1, // llvm.ppc.vsx.xvmindp
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen4175 ppc_vsx_xvmindp, // llvm.ppc.vsx.xvmindp
10233 "llvm.ppc.vsx.xvmindp",
18173 1, // llvm.ppc.vsx.xvmindp
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen4175 ppc_vsx_xvmindp, // llvm.ppc.vsx.xvmindp
10233 "llvm.ppc.vsx.xvmindp",
18173 1, // llvm.ppc.vsx.xvmindp
/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen4175 ppc_vsx_xvmindp, // llvm.ppc.vsx.xvmindp
10233 "llvm.ppc.vsx.xvmindp",
18173 1, // llvm.ppc.vsx.xvmindp