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Searched refs:xvmuldp (Results 1 – 11 of 11) sorted by relevance

/external/llvm/test/CodeGen/PowerPC/
Dswaps-le-7.ll15 ; CHECK-NEXT: xvmuldp
16 ; CHECK-NEXT: xvmuldp
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dswaps-le-7.ll14 ; CHECK-NEXT: xvmuldp
15 ; CHECK-DAG: xvmuldp
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dvsx.s371 # CHECK-BE: xvmuldp 7, 63, 27 # encoding: [0xf0,0xff,0xdb,0x84]
372 # CHECK-LE: xvmuldp 7, 63, 27 # encoding: [0x84,0xdb,0xff,0xf0]
373 xvmuldp 7, 63, 27
/external/llvm/test/MC/PowerPC/
Dvsx.s371 # CHECK-BE: xvmuldp 7, 63, 27 # encoding: [0xf0,0xff,0xdb,0x84]
372 # CHECK-LE: xvmuldp 7, 63, 27 # encoding: [0x84,0xdb,0xff,0xf0]
373 xvmuldp 7, 63, 27
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dvsx.txt366 # CHECK: xvmuldp 7, 63, 27
/external/llvm/test/MC/Disassembler/PowerPC/
Dvsx.txt366 # CHECK: xvmuldp 7, 63, 27
/external/v8/src/codegen/ppc/
Dconstants-ppc.h266 V(xvmuldp, XVMULDP, 0xF0000380) \
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc2404 __ xvmuldp(i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction() local
/external/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td165 "xvmuldp $XT, $XA, $XB", IIC_VecFP,
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc4390 "dp\txvmsubmsp\007xvmuldp\007xvmulsp\010xvnabsdp\010xvnabssp\007xvnegdp\007"
6876 …{ 13796 /* xvmuldp */, PPC::XVMULDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, 0, { MCK_RegVSRC…
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td209 "xvmuldp $XT, $XA, $XB", IIC_VecFP,