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Searched refs:xvnegsp (Results 1 – 12 of 12) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dppc64-P9-vabsd.ll13 ; CHECK-DAG: xvnegsp 34, 34
14 ; CHECK-DAG: xvnegsp 35, {{[0-9]+}}
32 ; CHECK-DAG: xvnegsp 34, 34
33 ; CHECK-DAG: xvnegsp 35, {{[0-9]+}}
88 ; CHECK-DAG: xvnegsp 34, 34
89 ; CHECK-DAG: xvnegsp 35, 35
Dvec_fneg.ll16 ; CHECK: xvnegsp
/external/llvm/test/CodeGen/PowerPC/
Dvec_fneg.ll16 ; CHECK: xvnegsp
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dvsx.s386 # CHECK-BE: xvnegsp 7, 27 # encoding: [0xf0,0xe0,0xde,0xe4]
387 # CHECK-LE: xvnegsp 7, 27 # encoding: [0xe4,0xde,0xe0,0xf0]
388 xvnegsp 7, 27
/external/llvm/test/MC/PowerPC/
Dvsx.s386 # CHECK-BE: xvnegsp 7, 27 # encoding: [0xf0,0xe0,0xde,0xe4]
387 # CHECK-LE: xvnegsp 7, 27 # encoding: [0xe4,0xde,0xe0,0xf0]
388 xvnegsp 7, 27
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dvsx.txt381 # CHECK: xvnegsp 7, 27
/external/llvm/test/MC/Disassembler/PowerPC/
Dvsx.txt381 # CHECK: xvnegsp 7, 27
/external/v8/src/codegen/ppc/
Dconstants-ppc.h372 V(xvnegsp, XVNEGSP, 0xF00006E4) \
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc2933 __ xvnegsp(i.OutputSimd128Register(), i.InputSimd128Register(0)); in AssembleArchInstruction() local
/external/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td537 "xvnegsp $XT, $XB", IIC_VecFP,
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc4391 "xvnegsp\nxvnmaddadp\nxvnmaddasp\nxvnmaddmdp\nxvnmaddmsp\nxvnmsubadp\nxv"
6881 …{ 13838 /* xvnegsp */, PPC::XVNEGSP, Convert__RegVSRC1_0__RegVSRC1_1, 0, { MCK_RegVSRC, MCK_RegVSR…
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td581 "xvnegsp $XT, $XB", IIC_VecFP,