Searched refs:xvsqrtdp (Results 1 – 9 of 9) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
| D | vsx.s | 455 # CHECK-BE: xvsqrtdp 7, 27 # encoding: [0xf0,0xe0,0xdb,0x2c]
456 # CHECK-LE: xvsqrtdp 7, 27 # encoding: [0x2c,0xdb,0xe0,0xf0]
457 xvsqrtdp 7, 27
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| /external/llvm/test/MC/PowerPC/ |
| D | vsx.s | 455 # CHECK-BE: xvsqrtdp 7, 27 # encoding: [0xf0,0xe0,0xdb,0x2c]
456 # CHECK-LE: xvsqrtdp 7, 27 # encoding: [0x2c,0xdb,0xe0,0xf0]
457 xvsqrtdp 7, 27
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
| D | vsx.txt | 450 # CHECK: xvsqrtdp 7, 27
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| /external/llvm/test/MC/Disassembler/PowerPC/ |
| D | vsx.txt | 450 # CHECK: xvsqrtdp 7, 27
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| /external/v8/src/codegen/ppc/ |
| D | constants-ppc.h | 368 V(xvsqrtdp, XVSQRTDP, 0xF000032C) \
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| /external/v8/src/compiler/backend/ppc/ |
| D | code-generator-ppc.cc | 2925 __ xvsqrtdp(i.OutputSimd128Register(), i.InputSimd128Register(0)); in AssembleArchInstruction() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrVSX.td | 419 "xvsqrtdp $XT, $XB", IIC_FPSqrtD,
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenAsmMatcher.inc | 4394 "xvrspip\007xvrspiz\nxvrsqrtedp\nxvrsqrtesp\010xvsqrtdp\010xvsqrtsp\007x"
6904 …{ 14048 /* xvsqrtdp */, PPC::XVSQRTDP, Convert__RegVSRC1_0__RegVSRC1_1, 0, { MCK_RegVSRC, MCK_RegV…
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrVSX.td | 463 "xvsqrtdp $XT, $XB", IIC_FPSqrtD,
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