/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
D | splat-larger-types-as-v16i8.ll | 7 ; CHECK: xxspltib 34, 1 12 ; CHECK: xxspltib 34, 171 18 ; CHECK: xxspltib 34, 171
|
D | power9-moves-and-splats.ll | 166 ; CHECK-NEXT: xxspltib v2, 1 171 ; CHECK-BE-NEXT: xxspltib v2, 1 180 ; CHECK-NEXT: xxspltib v2, 127 185 ; CHECK-BE-NEXT: xxspltib v2, 127 194 ; CHECK-NEXT: xxspltib v2, 128 199 ; CHECK-BE-NEXT: xxspltib v2, 128 208 ; CHECK-NEXT: xxspltib v2, 255 213 ; CHECK-BE-NEXT: xxspltib v2, 255 222 ; CHECK-NEXT: xxspltib v2, 129 227 ; CHECK-BE-NEXT: xxspltib v2, 129 [all …]
|
D | ppc64-P9-vabsd.ll | 67 ; CHECK: xxspltib {{[0-9]+}}, 128
|
D | build-vector-tests.ll | 757 ; P9BE: xxspltib v2, 255 759 ; P9LE: xxspltib v2, 255 1897 ; P9BE: xxspltib v2, 255 1899 ; P9LE: xxspltib v2, 255 3039 ; P9BE: xxspltib v2, 255 3041 ; P9LE: xxspltib v2, 255 3943 ; P9BE: xxspltib v2, 255 3945 ; P9LE: xxspltib v2, 255
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
D | vsx.s | 834 # CHECK-BE: xxspltib 63, 255 # encoding: [0xf3,0xe7,0xfa,0xd1] 835 # CHECK-LE: xxspltib 63, 255 # encoding: [0xd1,0xfa,0xe7,0xf3] 836 xxspltib 63, 255
|
/external/llvm/test/MC/PowerPC/ |
D | vsx.s | 848 # CHECK-BE: xxspltib 63, 255 # encoding: [0xf3,0xe7,0xfa,0xd1] 849 # CHECK-LE: xxspltib 63, 255 # encoding: [0xd1,0xfa,0xe7,0xf3] 850 xxspltib 63, 255
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
D | vsx.txt | 770 # CHECK: xxspltib 63, 255
|
/external/llvm/test/MC/Disassembler/PowerPC/ |
D | vsx.txt | 785 # CHECK: xxspltib 63, 255
|
/external/llvm/lib/Target/PowerPC/ |
D | p9-instrs.txt | 342 [PO T EO IMM8 XO TX] xxspltib <= sign or unsigned?
|
D | README_P9.txt | 487 - Vector Splat Immediate Byte: xxspltib
|
D | PPCInstrVSX.td | 2113 "xxspltib $XT, $IMM8", IIC_VecPerm, []>;
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | README_P9.txt | 487 - Vector Splat Immediate Byte: xxspltib
|
D | PPCInstrVSX.td | 2794 "xxspltib $XT, $IMM8", IIC_VecPerm, []>, UseVSXReg;
|
/external/v8/src/codegen/ppc/ |
D | assembler-ppc.h | 1025 void xxspltib(const Simd128Register rt, const Operand& imm);
|
D | constants-ppc.h | 2005 V(xxspltib, XXSPLTIB, 0xF00002D1)
|
D | assembler-ppc.cc | 1807 void Assembler::xxspltib(const Simd128Register rt, const Operand& imm) { in xxspltib() function in v8::internal::Assembler
|
/external/v8/src/compiler/backend/ppc/ |
D | code-generator-ppc.cc | 3236 __ xxspltib(tempFPReg2, Operand(31)); in AssembleArchInstruction() local
|
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/ |
D | PPCGenAsmMatcher.inc | 4400 "xxsel\007xxsldwi\007xxspltd\010xxspltib\007xxspltw\007xxswapd"; 6945 …{ 14357 /* xxspltib */, PPC::XXSPLTIB, Convert__RegVSRC1_0__U8Imm1_1, 0, { MCK_RegVSRC, MCK_U8Imm …
|