Home
last modified time | relevance | path

Searched refs:BIT11 (Results 1 – 25 of 72) sorted by relevance

123

/device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/Lan91xDxe/
DLan91xDxeHw.h81 #define TCR_FDUPLX BIT11
100 #define EPHSR_EXC_DEF BIT11
124 #define RPCR_ANEG BIT11
143 #define CTR_AUTO_REL BIT11
177 #define PTR_NOT_EMPTY BIT11
206 #define RX_TOO_LONG BIT11
248 #define PHYCR_PD BIT11 // Power-Down switch
261 #define PHYSTS_10BASET_HDPLX BIT11 // 10Mbps Half-Duplex ability
/device/linaro/bootloader/edk2/IntelFspPkg/Library/BaseCacheLib/
DCacheLibInternal.h33 #define B_EFI_MSR_CACHE_MTRR_VALID BIT11
34 #define B_EFI_MSR_GLOBAL_MTRR_ENABLE BIT11
50 #define B_EFI_MSR_IA32_MTRR_CAP_SMRR_SUPPORT BIT11
/device/linaro/bootloader/edk2/IntelFsp2Pkg/Library/BaseCacheLib/
DCacheLibInternal.h33 #define B_EFI_MSR_CACHE_MTRR_VALID BIT11
34 #define B_EFI_MSR_GLOBAL_MTRR_ENABLE BIT11
50 #define B_EFI_MSR_IA32_MTRR_CAP_SMRR_SUPPORT BIT11
/device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/
DPchRegsSata.h84 #define B_PCH_SATA_PCISTS_STA BIT11 // Signaled Target-Abort Status
170 #define B_PCH_SATA_MAP_SPD (BIT14 | BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8) /…
174 #define B_PCH_SATA_PORT3_DISABLED BIT11
190 #define B_PCH_SATA_PCS_PORT3_DET BIT11 // Port 3 Present
DPchRegsUsb.h70 #define B_PCH_EHCI_PWR_CNTL_STS_DATASEL (BIT12 | BIT11 | BIT10 | BIT9) // Data Select
93 #define B_PCH_XHCI_PWR_CNTL_STS_DATASEL (BIT12 | BIT11 | BIT10 | BIT9)
DPchRegsPcu.h92 #define B_PCH_LPC_DEV_STS_STA BIT11 // Signaled Target Abort
199 #define B_PCH_LPC_FWH_BIOS_DEC_ED8 BIT11 // D8-DF Enable
294 #define B_PCH_ILB_ULKMC_TRAPBY64W BIT11 // SMI Caused by Port 64 Write
467 #define B_PCH_ACPI_PM1_STS_PRBTNOR BIT11 // Power Button Override Status
501 #define B_PCH_ACPI_PM1_CNT_SLP_TYP (BIT12 | BIT11 | BIT10) // Sleep Type
655 #define B_PCH_TCO_CNT_TMR_HLT BIT11 // TCO Timer Halt
667 #define B_PCH_PMC_PRSTS_CODE_COPIED_STS BIT11 // Patch Copied Over Status
705 #define B_PCH_PMC_GEN_PMCON_SLP_S3_MAW (BIT11 | BIT10) // SLP_S3# Minimum Assertion Width
766 #define B_PCH_PMC_FUNC_DIS_MIPI BIT11 // MIPI-HSI Disable
767 #define B_PCH_PMC_FUNC_DIS_SDIO4 BIT11 // SCC SDIO #4 (Device 23, eMMC4.5) Disable
[all …]
DPchRegsRcrb.h47 #define B_PCH_RCRB_GCS_BBS (BIT11 | BIT10) // Boot BIOS Straps
/device/linaro/bootloader/edk2/EmbeddedPkg/Drivers/Lan9118Dxe/
DLan9118DxeHw.h141 #define RXSTATUS_RUNT BIT11 // Bad frame
156 #define TXSTATUS_LOST_CA BIT11 // Lost carrier during Tx
222 #define PHYCR_PD BIT11 // Power-Down switch
235 #define PHYSTS_10BASET_HDPLX BIT11 // 10Mbps Half-Duplex ability
277 #define MACCR_BCAST BIT11 // Disable Broadcast Frames bit
339 #define MII_ACC_PHY_VALUE BIT11
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/
Dgeneral_definitions.h28 #undef BIT11
64 #define BIT11 0x00000800U macro
Dmeminit.c557 …, ((BIT28|BIT27|BIT26|BIT25|BIT24)|(BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT12|BIT11|BIT10|BIT9|BIT8)|(… in ddrphy_init()
565 …Q_CH_OFFSET)), tempD, ((BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT13|BIT12|BIT11|BIT10|BIT9|BIT8)))… in ddrphy_init()
566 …Q_CH_OFFSET)), tempD, ((BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT13|BIT12|BIT11|BIT10|BIT9|BIT8)))… in ddrphy_init()
572 …), tempD, ((BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT14|BIT13|BIT12|BIT11|BIT10))); // Overr… in ddrphy_init()
573 …), tempD, ((BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT14|BIT13|BIT12|BIT11|BIT10))); // Overr… in ddrphy_init()
577 …tCAS-4)<<8)|((tCWL-2)<<0)), ((BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT12|BIT11|BIT10|BIT9|BIT8)|(… in ddrphy_init()
578 …tCAS-4)<<8)|((tCWL-2)<<0)), ((BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT12|BIT11|BIT10|BIT9|BIT8)|(… in ddrphy_init()
602 …BIT23|BIT22|BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT14|BIT13|BIT12|BIT11|BIT10|BIT9|BIT8|BI… in ddrphy_init()
603 …T23|BIT22|BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT14|BIT13|BIT12)|(BIT11|BIT10|BIT9|BIT8|BI… in ddrphy_init()
604 …BIT23|BIT22|BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT14|BIT13|BIT12|BIT11|BIT10|BIT9|BIT8)|(… in ddrphy_init()
[all …]
/device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/PL180MciDxe/
DPL180Mci.h81 #define MCI_CLOCK_WIDEBUS BIT11
94 #define MCI_STATUS_CMD_ACTIVE BIT11
129 #define MCI_CLR_ALL_STATUS (BIT11 - 1)
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/I2CLibDxe/
DI2CRegs.h56 #define I2C_INTR_GEN_CALL BIT11 // General call received
116 #define I2C_INTR_GEN_CALL BIT11 // General call received
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Include/
DQuarkNcSocId.h291 #define B_TSCGF1_CONFIG_ISNSCHOPSEL_MASK (BIT12 | BIT11 | BIT10 | BIT9 | BIT8)
464 #define B_QNC_PM1BLK_PM1C_SLPTP (BIT12+BIT11+BIT10)
649 #define B_QNC_PCIE_DCAP_E1AL (BIT11 | BIT10 | BIT9) // L1 Acceptable exit …
660 #define B_QNC_PCIE_LCAP_APMS_MASK (BIT11 | BIT10) //Active state link PM suppo…
667 #define B_QNC_PCIE_LSTS_LT (BIT11) //Link training
692 #define B_QNC_PCIE_MPC2_IPF (BIT11) // ISOF Packet Fast Transmit Mode
/device/linaro/bootloader/edk2/ArmPkg/Library/ArmDisassemblerLib/
DThumbDisassembler.c596 …int (&Buf[Offset], Size - Offset, " 0x%04x", PC + 4 + SignExtend32 ((OpCode & 0x3ff) << 1, BIT11)); in DisassembleThumbInstruction()
713 Target |= ((OpCode32 & BIT11) == BIT11)? BIT19 : 0; // J2 in DisassembleThumbInstruction()
724 J2 = (OpCode32 & BIT11) == BIT11; in DisassembleThumbInstruction()
737 J2 = (OpCode32 & BIT11) == BIT11; in DisassembleThumbInstruction()
864 … Target = (OpCode32 & 0xff) | ((OpCode32 >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0); in DisassembleThumbInstruction()
873 … Target = (OpCode32 & 0xff) | ((OpCode32 >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0); in DisassembleThumbInstruction()
879 … Target = (OpCode32 & 0xff) | ((OpCode32 >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0); in DisassembleThumbInstruction()
924 … Target = (OpCode32 & 0xff) | ((OpCode32 >> 8) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0); in DisassembleThumbInstruction()
935 … Target = (OpCode32 & 0xff) | ((OpCode >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0); in DisassembleThumbInstruction()
/device/linaro/bootloader/edk2/Omap35xxPkg/Include/Omap3530/
DOmap3530Prcm.h109 #define CM_FCLKEN_PER_EN_UART3_ENABLE BIT11
134 #define CM_ICLKEN_PER_EN_UART3_ENABLE BIT11
/device/linaro/bootloader/edk2/OvmfPkg/Include/IndustryStandard/
DI440FxPiix4.h36 #define PIIX4_PMBA_MASK (BIT15 | BIT14 | BIT13 | BIT12 | BIT11 | \
DVirtio095Net.h52 #define VIRTIO_NET_F_HOST_TSO4 BIT11 // host can receive TSOv4
DQ35MchIch9.h79 #define ICH9_PMBASE_MASK (BIT15 | BIT14 | BIT13 | BIT12 | BIT11 | \
/device/linaro/bootloader/edk2/MdePkg/Library/BasePeCoffLib/Arm/
DPeCoffLoaderEx.c48 Address |= (((Movt & BIT26) != 0) ? BIT11 : 0); // i in ThumbMovtImmediateAddress()
69 Patch |= (((Address & BIT11) != 0) ? BIT10 : 0); // i in ThumbMovtImmediatePatch()
/device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/Library/
DI2CLib.h67 #define I2C_INTR_GEN_CALL BIT11 // General call received
129 #define I2C_INTR_GEN_CALL BIT11 // General call received
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/I2CLibPei/
DI2CLibPei.h109 #define I2C_INTR_GEN_CALL BIT11 // General call received
173 #define I2C_INTR_GEN_CALL BIT11 // General call received
/device/linaro/bootloader/edk2/ShellPkg/Include/Library/
DHandleParsingLib.h153 #define HR_CHILD_HANDLE BIT11
154 #define HR_VALID_MASK (BIT1|BIT2|BIT3|BIT4|BIT5|BIT6|BIT7|BIT8|BIT9|BIT10|BIT11)
/device/linaro/bootloader/edk2/BeagleBoardPkg/Library/BeagleBoardLib/
DBeagleBoard.c48 MmioWrite32(GPIO6_BASE + GPIO_OE, (OldPinDir | BIT11 | BIT12 | BIT13)); in BeagleBoardGetRevision()
/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Hi6220/Include/
DHi6220.h32 #define CTRL4_PICO_VBUSVLDEXTSEL BIT11
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/
DCommonIncludes.h105 #define BIT11 0x00000800

123