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Searched refs:LSRV (Results 1 – 13 of 13) sorted by relevance

/external/pcre/dist2/src/sljit/
DsljitNativeARM_64.c103 #define LSRV 0x9ac02400 macro
785 FAIL_IF(push_inst(compiler, (LSRV ^ inv_bits) | RD(dst) | RN(arg1) | RM(arg2))); in emit_op_imm()
/external/llvm/lib/Target/AArch64/
DAArch64SchedCyclone.td169 // ASRV,LSLV,LSRV,RORV,BFM,SBFM,UBFM
DAArch64InstrInfo.td704 defm LSRV : Shift<0b01, "lsr", srl>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64SchedCyclone.td171 // ASRV,LSLV,LSRV,RORV,BFM,SBFM,UBFM
DAArch64SchedFalkorDetails.td1232 def : InstRW<[FalkorWr_1XYZ_1cyc], (instregex "^(LSLV|LSRV|ASRV|RORV)(W|X)r$")>;
DAArch64InstrInfo.td903 defm LSRV : Shift<0b01, "lsr", srl>;
/external/v8/src/codegen/arm64/
Dconstants-arm64.h1078 LSRV = LSRV_w, enumerator
Dassembler-arm64.cc948 Emit(SF(rd) | LSRV | Rm(rm) | Rn(rn) | Rd(rd)); in lsrv()
/external/vixl/src/aarch64/
Dconstants-aarch64.h1329 LSRV = LSRV_w, enumerator
Ddisasm-aarch64.cc813 FORMAT(LSRV, "lsr"); in VisitDataProcessing2Source()
Dassembler-aarch64.cc656 Emit(SF(rd) | LSRV | Rm(rm) | Rn(rn) | Rd(rd)); in lsrv()
/external/v8/src/diagnostics/arm64/
Ddisasm-arm64.cc649 FORMAT(LSRV, "lsr"); in VisitDataProcessing2Source()
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md1892 ### LSRV ### subsection