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Searched refs:PARAM_I_ADDRESS (Results 1 – 10 of 10) sorted by relevance

/external/llvm/lib/Target/AMDGPU/
DAMDGPU.h143 PARAM_I_ADDRESS = 7, ///< Address space for indirect addressible parameter memory (VTX1) enumerator
DAMDGPUTargetTransformInfo.cpp97 AddrSpace == AMDGPUAS::PARAM_I_ADDRESS || in getLoadStoreVecRegBitWidth()
DR600Instructions.td333 (cast<LoadSDNode>(N)->getAddressSpace() == AMDGPUAS::PARAM_I_ADDRESS); }]
DR600ISelLowering.cpp764 MVT PtrVT = getPointerTy(DAG.getDataLayout(), AMDGPUAS::PARAM_I_ADDRESS); in LowerOperation()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPU.h243 PARAM_I_ADDRESS = 7, enumerator
DAMDGPUTargetTransformInfo.cpp656 AddrSpace == AS.PARAM_I_ADDRESS || in getLoadStoreVecRegBitWidth()
DR600ISelLowering.cpp592 MVT PtrVT = getPointerTy(DAG.getDataLayout(), AMDGPUASI.PARAM_I_ADDRESS); in LowerOperation()
906 AMDGPUASI.PARAM_I_ADDRESS); in LowerImplicitParameter()
1609 AMDGPUASI.PARAM_I_ADDRESS); in LowerFormalArguments()
2059 if (LoadNode->getAddressSpace() == AMDGPUAS::PARAM_I_ADDRESS && in PerformDAGCombine()
DR600Instructions.td302 (cast<LoadSDNode>(N)->getAddressSpace() == AMDGPUASI.PARAM_I_ADDRESS); }]
/external/llvm/include/llvm/IR/
DIntrinsicsAMDGPU.td47 // AS 7 is PARAM_I_ADDRESS, used for kernel arguments
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/
DIntrinsicsAMDGPU.td54 // AS 7 is PARAM_I_ADDRESS, used for kernel arguments