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Searched refs:ddrpll (Results 1 – 6 of 6) sorted by relevance

/external/u-boot/arch/arm/cpu/arm926ejs/spear/
Dspl.c28 u32 clkenb, ddrpll; in ddr_clock_init() local
38 ddrpll = readl(&misc_p->pll_ctr_reg); in ddr_clock_init()
39 ddrpll &= ~MEM_CLK_SEL_MSK; in ddr_clock_init()
41 ddrpll |= MEM_CLK_HCLK; in ddr_clock_init()
43 ddrpll |= MEM_CLK_2HCLK; in ddr_clock_init()
45 ddrpll |= MEM_CLK_PLL2; in ddr_clock_init()
49 writel(ddrpll, &misc_p->pll_ctr_reg); in ddr_clock_init()
/external/u-boot/arch/mips/mach-ath79/ar934x/
Dclk.c261 u32 ctrl, cpu, cpupll, ddr, ddrpll; in ar934x_update_clock() local
273 ddrpll = ar934x_ddrpll_to_hz(ddr); in ar934x_update_clock()
280 cpuclk = ddrpll; in ar934x_update_clock()
285 ddrclk = ddrpll; in ar934x_update_clock()
292 busclk = ddrpll; in ar934x_update_clock()
/external/u-boot/arch/arm/dts/
Dzynq-cse-nand.dts52 clock-output-names = "armpll", "ddrpll",
Dzynq-cse-nor.dts59 clock-output-names = "armpll", "ddrpll",
Dzynq-cse-qspi.dtsi105 clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
Dzynq-7000.dtsi297 clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",