| /external/llvm/test/CodeGen/ARM/ |
| D | 2013-04-18-load-overlap-PR14824.ll | 16 %data.i.i677.48.extract.shift = lshr i512 %s122, 384
17 %data.i.i677.48.extract.trunc = trunc i512 %data.i.i677.48.extract.shift to i64
18 %s123 = insertelement <8 x i64> undef, i64 %data.i.i677.48.extract.trunc, i32 0
19 %data.i.i677.32.extract.shift = lshr i512 %s122, 256
20 %data.i.i677.32.extract.trunc = trunc i512 %data.i.i677.32.extract.shift to i64
21 %s124 = insertelement <8 x i64> %s123, i64 %data.i.i677.32.extract.trunc, i32 1
22 %data.i.i677.16.extract.shift = lshr i512 %s122, 128
23 %data.i.i677.16.extract.trunc = trunc i512 %data.i.i677.16.extract.shift to i64
24 %s125 = insertelement <8 x i64> %s124, i64 %data.i.i677.16.extract.trunc, i32 2
25 %data.i.i677.56.extract.shift = lshr i512 %s122, 448
[all …]
|
| D | combine-vmovdrr.ll | 20 %shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 0
21 %shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 1
22 %tmp45 = bitcast i64 %shuffle.i.extract.i310 to <8 x i8>
23 %tmp46 = bitcast i64 %shuffle.i27.extract.i311 to <8 x i8>
36 %shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 %index
37 %shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 1
38 %tmp45 = bitcast i64 %shuffle.i.extract.i310 to <8 x i8>
39 %tmp46 = bitcast i64 %shuffle.i27.extract.i311 to <8 x i8>
65 %shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 0
66 %shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 1
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | 2013-04-18-load-overlap-PR14824.ll | 16 %data.i.i677.48.extract.shift = lshr i512 %s122, 384
17 %data.i.i677.48.extract.trunc = trunc i512 %data.i.i677.48.extract.shift to i64
18 %s123 = insertelement <8 x i64> undef, i64 %data.i.i677.48.extract.trunc, i32 0
19 %data.i.i677.32.extract.shift = lshr i512 %s122, 256
20 %data.i.i677.32.extract.trunc = trunc i512 %data.i.i677.32.extract.shift to i64
21 %s124 = insertelement <8 x i64> %s123, i64 %data.i.i677.32.extract.trunc, i32 1
22 %data.i.i677.16.extract.shift = lshr i512 %s122, 128
23 %data.i.i677.16.extract.trunc = trunc i512 %data.i.i677.16.extract.shift to i64
24 %s125 = insertelement <8 x i64> %s124, i64 %data.i.i677.16.extract.trunc, i32 2
25 %data.i.i677.56.extract.shift = lshr i512 %s122, 448
[all …]
|
| D | fp16-instructions.ll | 52 %tmp.0.extract.trunc = trunc i32 %0 to i16
53 %1 = bitcast i16 %tmp.0.extract.trunc to half
55 %tmp1.0.extract.trunc = trunc i32 %2 to i16
56 %3 = bitcast i16 %tmp1.0.extract.trunc to half
108 %tmp.0.extract.trunc = trunc i32 %0 to i16
109 %1 = bitcast i16 %tmp.0.extract.trunc to half
111 %tmp1.0.extract.trunc = trunc i32 %2 to i16
112 %3 = bitcast i16 %tmp1.0.extract.trunc to half
141 %tmp.0.extract.trunc = trunc i32 %0 to i16
142 %1 = bitcast i16 %tmp.0.extract.trunc to half
[all …]
|
| D | combine-vmovdrr.ll | 20 %shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 0
21 %shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 1
22 %tmp45 = bitcast i64 %shuffle.i.extract.i310 to <8 x i8>
23 %tmp46 = bitcast i64 %shuffle.i27.extract.i311 to <8 x i8>
36 %shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 %index
37 %shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 1
38 %tmp45 = bitcast i64 %shuffle.i.extract.i310 to <8 x i8>
39 %tmp46 = bitcast i64 %shuffle.i27.extract.i311 to <8 x i8>
65 %shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 0
66 %shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 1
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/ |
| D | bit-loop.ll | 18 %v.sroa.0.0.extract.trunc = trunc i64 %0 to i16
19 %v.sroa.4.0.extract.shift = lshr i64 %0, 16
20 %v.sroa.4.0.extract.trunc = trunc i64 %v.sroa.4.0.extract.shift to i16
21 %v.sroa.5.0.extract.shift = lshr i64 %0, 32
22 %v.sroa.5.0.extract.trunc = trunc i64 %v.sroa.5.0.extract.shift to i16
23 %v.sroa.6.0.extract.shift = lshr i64 %0, 48
24 %v.sroa.6.0.extract.trunc = trunc i64 %v.sroa.6.0.extract.shift to i16
42 …%v.sroa.0.157 = phi i16 [ %v.sroa.0.0.extract.trunc34, %for.body ], [ %v.sroa.0.0.extract.trunc, %…
43 …%v.sroa.4.156 = phi i16 [ %v.sroa.4.0.extract.trunc36, %for.body ], [ %v.sroa.4.0.extract.trunc, %…
44 …%v.sroa.5.155 = phi i16 [ %v.sroa.5.0.extract.trunc38, %for.body ], [ %v.sroa.5.0.extract.trunc, %…
[all …]
|
| D | two-crash.ll | 10 %t.sroa.0.0.extract.trunc = trunc i64 %x to i32
11 %t4.sroa.4.0.extract.shift = lshr i64 %x, 16
12 %add11 = add i32 0, %t.sroa.0.0.extract.trunc
13 %t14.sroa.3.0.extract.trunc = trunc i64 %t4.sroa.4.0.extract.shift to i32
14 %t14.sroa.4.0.extract.shift = lshr i64 %x, 24
15 %add21 = add i32 %add11, %t14.sroa.3.0.extract.trunc
16 %t24.sroa.3.0.extract.trunc = trunc i64 %t14.sroa.4.0.extract.shift to i32
17 %add31 = add i32 %add21, %t24.sroa.3.0.extract.trunc
|
| D | insert4.ll | 23 %h.sroa.0.0.extract.trunc = trunc i64 %c to i32
24 %sext = shl i32 %h.sroa.0.0.extract.trunc, 16
26 %l.sroa.2.4.extract.shift = lshr i64 %c, 32
27 %sext76 = ashr i32 %h.sroa.0.0.extract.trunc, 16
28 %m.sroa.2.6.extract.shift = lshr i64 %c, 48
29 %sext7980 = shl nuw nsw i64 %l.sroa.2.4.extract.shift, 16
32 %sext8283 = shl nuw nsw i64 %m.sroa.2.6.extract.shift, 16
43 %n_union3.sroa.0.0.extract.trunc = trunc i64 %1 to i32
44 %n_union3.sroa.1.4.extract.shift = lshr i64 %1, 32
45 %2 = tail call i64 @llvm.hexagon.M2.dpmpyss.s0(i32 %n_union3.sroa.0.0.extract.trunc, i32 %conv8)
[all …]
|
| /external/llvm/test/CodeGen/Hexagon/ |
| D | bit-loop.ll | 19 %v.sroa.0.0.extract.trunc = trunc i64 %0 to i16
20 %v.sroa.4.0.extract.shift = lshr i64 %0, 16
21 %v.sroa.4.0.extract.trunc = trunc i64 %v.sroa.4.0.extract.shift to i16
22 %v.sroa.5.0.extract.shift = lshr i64 %0, 32
23 %v.sroa.5.0.extract.trunc = trunc i64 %v.sroa.5.0.extract.shift to i16
24 %v.sroa.6.0.extract.shift = lshr i64 %0, 48
25 %v.sroa.6.0.extract.trunc = trunc i64 %v.sroa.6.0.extract.shift to i16
43 …%v.sroa.0.157 = phi i16 [ %v.sroa.0.0.extract.trunc34, %for.body ], [ %v.sroa.0.0.extract.trunc, %…
44 …%v.sroa.4.156 = phi i16 [ %v.sroa.4.0.extract.trunc36, %for.body ], [ %v.sroa.4.0.extract.trunc, %…
45 …%v.sroa.5.155 = phi i16 [ %v.sroa.5.0.extract.trunc38, %for.body ], [ %v.sroa.5.0.extract.trunc, %…
[all …]
|
| D | insert4.ll | 23 %h.sroa.0.0.extract.trunc = trunc i64 %c to i32
24 %sext = shl i32 %h.sroa.0.0.extract.trunc, 16
26 %l.sroa.2.4.extract.shift = lshr i64 %c, 32
27 %sext76 = ashr i32 %h.sroa.0.0.extract.trunc, 16
28 %m.sroa.2.6.extract.shift = lshr i64 %c, 48
29 %sext7980 = shl nuw nsw i64 %l.sroa.2.4.extract.shift, 16
32 %sext8283 = shl nuw nsw i64 %m.sroa.2.6.extract.shift, 16
43 %n_union3.sroa.0.0.extract.trunc = trunc i64 %1 to i32
44 %n_union3.sroa.1.4.extract.shift = lshr i64 %1, 32
45 %2 = tail call i64 @llvm.hexagon.M2.dpmpyss.s0(i32 %n_union3.sroa.0.0.extract.trunc, i32 %conv8)
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/EarlyCSE/AArch64/ |
| D | intrinsics.ll | 11 %s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
12 %s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
23 %1 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
24 %2 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
30 %vld2.fca.0.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 0
31 %vld2.fca.1.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 1
32 %call = call <4 x i32> @vaddq_s32(<4 x i32> %vld2.fca.0.extract, <4 x i32> %vld2.fca.0.extract)
45 ….aarch64.neon.st2.v4i32.p0i8(<4 x i32> %s.coerce.fca.0.extract, <4 x i32> %s.coerce.fca.1.extract,…
46 %s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
47 %s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
[all …]
|
| /external/llvm/test/Transforms/SLPVectorizer/X86/ |
| D | pr18060.ll | 9 %extract.t = trunc i64 %Value to i32
10 %extract = lshr i64 %Value, 12
11 %extract.t6 = trunc i64 %extract to i32
25 %extract.t5 = trunc i64 %shr to i32
27 %extract.t8 = trunc i64 %extract7 to i32
31 %Value.addr.0.off0 = phi i32 [ %extract.t, %entry ], [ %extract.t5, %sw.bb1 ]
32 %Value.addr.0.off12 = phi i32 [ %extract.t6, %entry ], [ %extract.t8, %sw.bb1 ]
41 %retval.0 = phi i32 [ %or11, %sw.bb2 ], [ %extract.t, %entry ], [ %extract.t, %entry ]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/X86/ |
| D | pr18060.ll | 9 %extract.t = trunc i64 %Value to i32
10 %extract = lshr i64 %Value, 12
11 %extract.t6 = trunc i64 %extract to i32
25 %extract.t5 = trunc i64 %shr to i32
27 %extract.t8 = trunc i64 %extract7 to i32
31 %Value.addr.0.off0 = phi i32 [ %extract.t, %entry ], [ %extract.t5, %sw.bb1 ]
32 %Value.addr.0.off12 = phi i32 [ %extract.t6, %entry ], [ %extract.t8, %sw.bb1 ]
41 %retval.0 = phi i32 [ %or11, %sw.bb2 ], [ %extract.t, %entry ], [ %extract.t, %entry ]
|
| /external/llvm/test/Transforms/EarlyCSE/AArch64/ |
| D | intrinsics.ll | 9 %s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
10 %s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
21 %1 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
22 %2 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
28 %vld2.fca.0.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 0
29 %vld2.fca.1.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 1
30 %call = call <4 x i32> @vaddq_s32(<4 x i32> %vld2.fca.0.extract, <4 x i32> %vld2.fca.0.extract)
44 %s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
45 %s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
56 %1 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
[all …]
|
| /external/llvm/test/Transforms/SLPVectorizer/ARM/ |
| D | sroa.ll | 17 %a.coerce.fca.0.extract = extractvalue [4 x i32] %a.coerce, 0
18 %a.sroa.0.0.insert.ext = zext i32 %a.coerce.fca.0.extract to i64
19 %a.coerce.fca.1.extract = extractvalue [4 x i32] %a.coerce, 1
20 %a.sroa.0.4.insert.ext = zext i32 %a.coerce.fca.1.extract to i64
24 %a.coerce.fca.2.extract = extractvalue [4 x i32] %a.coerce, 2
25 %a.sroa.3.8.insert.ext = zext i32 %a.coerce.fca.2.extract to i64
26 %a.coerce.fca.3.extract = extractvalue [4 x i32] %a.coerce, 3
27 %a.sroa.3.12.insert.ext = zext i32 %a.coerce.fca.3.extract to i64
31 %b.coerce.fca.0.extract = extractvalue [4 x i32] %b.coerce, 0
32 %b.sroa.0.0.insert.ext = zext i32 %b.coerce.fca.0.extract to i64
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/ARM/ |
| D | sroa.ll | 17 %a.coerce.fca.0.extract = extractvalue [4 x i32] %a.coerce, 0
18 %a.sroa.0.0.insert.ext = zext i32 %a.coerce.fca.0.extract to i64
19 %a.coerce.fca.1.extract = extractvalue [4 x i32] %a.coerce, 1
20 %a.sroa.0.4.insert.ext = zext i32 %a.coerce.fca.1.extract to i64
24 %a.coerce.fca.2.extract = extractvalue [4 x i32] %a.coerce, 2
25 %a.sroa.3.8.insert.ext = zext i32 %a.coerce.fca.2.extract to i64
26 %a.coerce.fca.3.extract = extractvalue [4 x i32] %a.coerce, 3
27 %a.sroa.3.12.insert.ext = zext i32 %a.coerce.fca.3.extract to i64
31 %b.coerce.fca.0.extract = extractvalue [4 x i32] %b.coerce, 0
32 %b.sroa.0.0.insert.ext = zext i32 %b.coerce.fca.0.extract to i64
[all …]
|
| /external/python/cpython3/Lib/test/ |
| D | test_traceback.py | 750 def extract(**kwargs): function
758 nolim = extract()
760 self.assertEqual(extract(limit=2), nolim[-2:])
761 assertEqualExcept(extract(limit=100), nolim[-100:], -5-1)
762 self.assertEqual(extract(limit=-2), nolim[:2])
763 assertEqualExcept(extract(limit=-100), nolim[:100], len(nolim)-5-1)
764 self.assertEqual(extract(limit=0), [])
766 assertEqualExcept(extract(), nolim, -5-1)
768 self.assertEqual(extract(), nolim[-2:])
769 self.assertEqual(extract(limit=3), nolim[-3:])
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/docs/CommandGuide/ |
| D | llvm-extract.rst | 1 llvm-extract - extract a function from an LLVM module
7 :program:`llvm-extract` [*options*] **--func** *function-name* [*filename*]
12 The :program:`llvm-extract` command takes the name of a function and extracts
17 :program:`llvm-extract` will also remove unreachable global variables,
20 The :program:`llvm-extract` command reads its input from standard input if
29 Enable binary output on terminals. Normally, :program:`llvm-extract` will
31 this option, :program:`llvm-extract` will write raw bitcode regardless of the
37 specified multiple times to extract multiple functions at once.
48 specified multiple times to extract multiple global variables at once.
63 :program:`llvm-extract` sends its output to standard output.
[all …]
|
| /external/llvm/docs/CommandGuide/ |
| D | llvm-extract.rst | 1 llvm-extract - extract a function from an LLVM module
7 :program:`llvm-extract` [*options*] **--func** *function-name* [*filename*]
12 The :program:`llvm-extract` command takes the name of a function and extracts
17 :program:`llvm-extract` will also remove unreachable global variables,
20 The :program:`llvm-extract` command reads its input from standard input if
29 Enable binary output on terminals. Normally, :program:`llvm-extract` will
31 this option, :program:`llvm-extract` will write raw bitcode regardless of the
37 specified multiple times to extract multiple functions at once.
48 specified multiple times to extract multiple global variables at once.
63 :program:`llvm-extract` sends its output to standard output.
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | arm64-dagcombiner-load-slicing.ll | 20 %t0.sroa.0.0.extract.trunc = trunc i64 %1 to i32
21 %2 = bitcast i32 %t0.sroa.0.0.extract.trunc to float
22 %t0.sroa.2.0.extract.shift = lshr i64 %1, 32
23 %t0.sroa.2.0.extract.trunc = trunc i64 %t0.sroa.2.0.extract.shift to i32
24 %3 = bitcast i32 %t0.sroa.2.0.extract.trunc to float
52 %t0.sroa.0.0.extract.trunc = trunc i64 %1 to i32
53 %2 = bitcast i32 %t0.sroa.0.0.extract.trunc to i32
54 %t0.sroa.2.0.extract.shift = lshr i64 %1, 32
55 %t0.sroa.2.0.extract.trunc = trunc i64 %t0.sroa.2.0.extract.shift to i32
56 %3 = bitcast i32 %t0.sroa.2.0.extract.trunc to i32
[all …]
|
| D | arm64-neon-copyPhysReg-tuple.ll | 11 %extract = extractvalue { <4 x i32>, <4 x i32> } %vld, 0
12 …<4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0i32(<4 x i32> %extract, <4 x i32> <i32 -…
13 %vld1.fca.0.extract = extractvalue { <4 x i32>, <4 x i32> } %vld1, 0
14 ret <4 x i32> %vld1.fca.0.extract
25 %extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } %vld, 0
26 …<4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0i32(<4 x i32> %extract, <4 x i32> <i32 -…
27 %vld1.fca.0.extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } %vld1, 0
28 ret <4 x i32> %vld1.fca.0.extract
40 %extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %vld, 0
41 …<4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0i32(<4 x i32> %extract, <4 x i32> <i32 -…
[all …]
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-dagcombiner-load-slicing.ll | 20 %t0.sroa.0.0.extract.trunc = trunc i64 %1 to i32
21 %2 = bitcast i32 %t0.sroa.0.0.extract.trunc to float
22 %t0.sroa.2.0.extract.shift = lshr i64 %1, 32
23 %t0.sroa.2.0.extract.trunc = trunc i64 %t0.sroa.2.0.extract.shift to i32
24 %3 = bitcast i32 %t0.sroa.2.0.extract.trunc to float
52 %t0.sroa.0.0.extract.trunc = trunc i64 %1 to i32
53 %2 = bitcast i32 %t0.sroa.0.0.extract.trunc to i32
54 %t0.sroa.2.0.extract.shift = lshr i64 %1, 32
55 %t0.sroa.2.0.extract.trunc = trunc i64 %t0.sroa.2.0.extract.shift to i32
56 %3 = bitcast i32 %t0.sroa.2.0.extract.trunc to i32
[all …]
|
| D | arm64-neon-copyPhysReg-tuple.ll | 11 %extract = extractvalue { <4 x i32>, <4 x i32> } %vld, 0
12 …<4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0i32(<4 x i32> %extract, <4 x i32> <i32 -…
13 %vld1.fca.0.extract = extractvalue { <4 x i32>, <4 x i32> } %vld1, 0
14 ret <4 x i32> %vld1.fca.0.extract
25 %extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } %vld, 0
26 …<4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0i32(<4 x i32> %extract, <4 x i32> <i32 -…
27 %vld1.fca.0.extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } %vld1, 0
28 ret <4 x i32> %vld1.fca.0.extract
40 %extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %vld, 0
41 …<4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0i32(<4 x i32> %extract, <4 x i32> <i32 -…
[all …]
|
| /external/robolectric-shadows/shadows/framework/src/main/java/org/robolectric/shadows/ |
| D | ShadowToast.java | 39 ShadowToast shadowToast = Shadow.extract(toast); in makeText()
46 ShadowApplication shadowApplication = Shadow.extract(RuntimeEnvironment.application); in show()
132 ShadowApplication shadowApplication = Shadow.extract(RuntimeEnvironment.application); in reset()
144 ShadowApplication shadowApplication = Shadow.extract(RuntimeEnvironment.application); in shownToastCount()
157 ShadowApplication shadowApplication = Shadow.extract(RuntimeEnvironment.application); in showedCustomToast()
174 ShadowApplication shadowApplication = Shadow.extract(RuntimeEnvironment.application); in showedToast()
176 ShadowToast shadowToast = Shadow.extract(toast); in showedToast()
191 ShadowApplication shadowApplication = Shadow.extract(RuntimeEnvironment.application); in getTextOfLatestToast()
197 ShadowToast shadowToast = Shadow.extract(latestToast); in getTextOfLatestToast()
208 ShadowApplication shadowApplication = Shadow.extract(RuntimeEnvironment.application); in getLatestToast()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | f128-aggregates.ll | 74 %a.coerce.fca.7.extract = extractvalue [8 x fp128] %a.coerce, 7
75 ret fp128 %a.coerce.fca.7.extract
126 %a.coerce.fca.3.extract = extractvalue [8 x fp128] %a.coerce, 3
127 ret fp128 %a.coerce.fca.3.extract
140 %a.coerce.fca.0.extract = extractvalue [1 x fp128] %a.coerce, 0
141 ret fp128 %a.coerce.fca.0.extract
154 %a.coerce.fca.0.extract = extractvalue [3 x fp128] %a.coerce, 0
155 ret fp128 %a.coerce.fca.0.extract
170 %a.coerce.fca.1.extract = extractvalue [3 x fp128] %a.coerce, 1
171 ret fp128 %a.coerce.fca.1.extract
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