Searched refs:spsr_irq (Results 1 – 10 of 10) sorted by relevance
/external/arm-trusted-firmware/include/arch/aarch32/ |
D | smccc_macros.S | 65 mrs r6, spsr_irq 207 msr spsr_irq, r6
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D | smccc_helpers.h | 55 u_register_t spsr_irq; member
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/external/llvm/test/MC/ARM/ |
D | move-banked-regs.s | 53 mrs r1, spsr_irq 163 msr spsr_irq, r11
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | move-banked-regs.s | 53 mrs r1, spsr_irq 163 msr spsr_irq, r11
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
D | ARMGenSystemRegister.inc | 32 spsr_irq = 29, 115 { "spsr_irq", 0x30 }, // 27
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/external/arm-trusted-firmware/lib/el3_runtime/aarch64/ |
D | context.S | 81 mrs x13, spsr_irq 179 msr spsr_irq, x13
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMSystemRegister.td | 151 def : BankedReg<"spsr_irq", 0x30>;
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/external/arm-trusted-firmware/bl31/aarch64/ |
D | crash_reporting.S | 298 mrs x12, spsr_irq
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/external/capstone/suite/MC/AArch64/ |
D | basic-a64-instructions.s.cs | 1570 0x0c,0x43,0x1c,0xd5 = msr spsr_irq, x12 1882 0x09,0x43,0x3c,0xd5 = mrs x9, spsr_irq
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/external/arm-trusted-firmware/docs/design/ |
D | firmware-design.rst | 1227 spsr_irq :0x0000000000000000
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