1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-apple-macosx10.10.0 -mattr=+avx512vl | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512VL 3; RUN: llc < %s -mtriple=x86_64-apple-macosx10.10.0 -mattr=+avx512vl,+avx512dq | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512VLDQ 4 5define <4 x float> @v4f32(<4 x float> %a, <4 x float> %b) nounwind { 6; AVX512VL-LABEL: v4f32: 7; AVX512VL: ## %bb.0: 8; AVX512VL-NEXT: vpandd {{.*}}(%rip){1to4}, %xmm1, %xmm1 9; AVX512VL-NEXT: vpandd {{.*}}(%rip){1to4}, %xmm0, %xmm0 10; AVX512VL-NEXT: vpor %xmm1, %xmm0, %xmm0 11; AVX512VL-NEXT: retq 12; 13; AVX512VLDQ-LABEL: v4f32: 14; AVX512VLDQ: ## %bb.0: 15; AVX512VLDQ-NEXT: vandps {{.*}}(%rip){1to4}, %xmm1, %xmm1 16; AVX512VLDQ-NEXT: vandps {{.*}}(%rip){1to4}, %xmm0, %xmm0 17; AVX512VLDQ-NEXT: vorps %xmm1, %xmm0, %xmm0 18; AVX512VLDQ-NEXT: retq 19 %tmp = tail call <4 x float> @llvm.copysign.v4f32( <4 x float> %a, <4 x float> %b ) 20 ret <4 x float> %tmp 21} 22 23define <8 x float> @v8f32(<8 x float> %a, <8 x float> %b) nounwind { 24; AVX512VL-LABEL: v8f32: 25; AVX512VL: ## %bb.0: 26; AVX512VL-NEXT: vpandd {{.*}}(%rip){1to8}, %ymm1, %ymm1 27; AVX512VL-NEXT: vpandd {{.*}}(%rip){1to8}, %ymm0, %ymm0 28; AVX512VL-NEXT: vpor %ymm1, %ymm0, %ymm0 29; AVX512VL-NEXT: retq 30; 31; AVX512VLDQ-LABEL: v8f32: 32; AVX512VLDQ: ## %bb.0: 33; AVX512VLDQ-NEXT: vandps {{.*}}(%rip){1to8}, %ymm1, %ymm1 34; AVX512VLDQ-NEXT: vandps {{.*}}(%rip){1to8}, %ymm0, %ymm0 35; AVX512VLDQ-NEXT: vorps %ymm1, %ymm0, %ymm0 36; AVX512VLDQ-NEXT: retq 37 %tmp = tail call <8 x float> @llvm.copysign.v8f32( <8 x float> %a, <8 x float> %b ) 38 ret <8 x float> %tmp 39} 40 41define <16 x float> @v16f32(<16 x float> %a, <16 x float> %b) nounwind { 42; AVX512VL-LABEL: v16f32: 43; AVX512VL: ## %bb.0: 44; AVX512VL-NEXT: vpandd {{.*}}(%rip){1to16}, %zmm1, %zmm1 45; AVX512VL-NEXT: vpandd {{.*}}(%rip){1to16}, %zmm0, %zmm0 46; AVX512VL-NEXT: vporq %zmm1, %zmm0, %zmm0 47; AVX512VL-NEXT: retq 48; 49; AVX512VLDQ-LABEL: v16f32: 50; AVX512VLDQ: ## %bb.0: 51; AVX512VLDQ-NEXT: vandps {{.*}}(%rip){1to16}, %zmm1, %zmm1 52; AVX512VLDQ-NEXT: vandps {{.*}}(%rip){1to16}, %zmm0, %zmm0 53; AVX512VLDQ-NEXT: vorps %zmm1, %zmm0, %zmm0 54; AVX512VLDQ-NEXT: retq 55 %tmp = tail call <16 x float> @llvm.copysign.v16f32( <16 x float> %a, <16 x float> %b ) 56 ret <16 x float> %tmp 57} 58 59define <2 x double> @v2f64(<2 x double> %a, <2 x double> %b) nounwind { 60; CHECK-LABEL: v2f64: 61; CHECK: ## %bb.0: 62; CHECK-NEXT: vandps {{.*}}(%rip), %xmm1, %xmm1 63; CHECK-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 64; CHECK-NEXT: vorps %xmm1, %xmm0, %xmm0 65; CHECK-NEXT: retq 66 %tmp = tail call <2 x double> @llvm.copysign.v2f64( <2 x double> %a, <2 x double> %b ) 67 ret <2 x double> %tmp 68} 69 70define <4 x double> @v4f64(<4 x double> %a, <4 x double> %b) nounwind { 71; AVX512VL-LABEL: v4f64: 72; AVX512VL: ## %bb.0: 73; AVX512VL-NEXT: vpandq {{.*}}(%rip){1to4}, %ymm1, %ymm1 74; AVX512VL-NEXT: vpandq {{.*}}(%rip){1to4}, %ymm0, %ymm0 75; AVX512VL-NEXT: vpor %ymm1, %ymm0, %ymm0 76; AVX512VL-NEXT: retq 77; 78; AVX512VLDQ-LABEL: v4f64: 79; AVX512VLDQ: ## %bb.0: 80; AVX512VLDQ-NEXT: vandpd {{.*}}(%rip){1to4}, %ymm1, %ymm1 81; AVX512VLDQ-NEXT: vandpd {{.*}}(%rip){1to4}, %ymm0, %ymm0 82; AVX512VLDQ-NEXT: vorpd %ymm1, %ymm0, %ymm0 83; AVX512VLDQ-NEXT: retq 84 %tmp = tail call <4 x double> @llvm.copysign.v4f64( <4 x double> %a, <4 x double> %b ) 85 ret <4 x double> %tmp 86} 87 88define <8 x double> @v8f64(<8 x double> %a, <8 x double> %b) nounwind { 89; AVX512VL-LABEL: v8f64: 90; AVX512VL: ## %bb.0: 91; AVX512VL-NEXT: vpandq {{.*}}(%rip){1to8}, %zmm1, %zmm1 92; AVX512VL-NEXT: vpandq {{.*}}(%rip){1to8}, %zmm0, %zmm0 93; AVX512VL-NEXT: vporq %zmm1, %zmm0, %zmm0 94; AVX512VL-NEXT: retq 95; 96; AVX512VLDQ-LABEL: v8f64: 97; AVX512VLDQ: ## %bb.0: 98; AVX512VLDQ-NEXT: vandpd {{.*}}(%rip){1to8}, %zmm1, %zmm1 99; AVX512VLDQ-NEXT: vandpd {{.*}}(%rip){1to8}, %zmm0, %zmm0 100; AVX512VLDQ-NEXT: vorpd %zmm1, %zmm0, %zmm0 101; AVX512VLDQ-NEXT: retq 102 %tmp = tail call <8 x double> @llvm.copysign.v8f64( <8 x double> %a, <8 x double> %b ) 103 ret <8 x double> %tmp 104} 105 106declare <4 x float> @llvm.copysign.v4f32(<4 x float> %Mag, <4 x float> %Sgn) 107declare <8 x float> @llvm.copysign.v8f32(<8 x float> %Mag, <8 x float> %Sgn) 108declare <16 x float> @llvm.copysign.v16f32(<16 x float> %Mag, <16 x float> %Sgn) 109declare <2 x double> @llvm.copysign.v2f64(<2 x double> %Mag, <2 x double> %Sgn) 110declare <4 x double> @llvm.copysign.v4f64(<4 x double> %Mag, <4 x double> %Sgn) 111declare <8 x double> @llvm.copysign.v8f64(<8 x double> %Mag, <8 x double> %Sgn) 112 113