1// SPDX-License-Identifier: GPL-2.0+ OR X11 2/* 3 * Copyright 2019 Toradex AG 4 */ 5 6/dts-v1/; 7#include <dt-bindings/gpio/gpio.h> 8#include "imx6dl.dtsi" 9 10/ { 11 model = "Toradex Colibri iMX6DL/S"; 12 compatible = "toradex,colibri_imx6dl", "fsl,imx6dl"; 13 14 /* Will be filled by the bootloader */ 15 memory@10000000 { 16 device_type = "memory"; 17 reg = <0x10000000 0>; 18 }; 19 20 aliases { 21 mmc0 = &usdhc3; 22 mmc1 = &usdhc1; 23 usb0 = &usbotg; /* required for ums */ 24 }; 25 26 chosen { 27 stdout-path = &uart1; 28 }; 29 30 reg_module_3v3: regulator-module-3v3 { 31 compatible = "regulator-fixed"; 32 regulator-name = "+V3.3"; 33 regulator-min-microvolt = <3300000>; 34 regulator-max-microvolt = <3300000>; 35 regulator-always-on; 36 }; 37 38 reg_usb_host_vbus: regulator-usb-host-vbus { 39 compatible = "regulator-fixed"; 40 pinctrl-names = "default"; 41 pinctrl-0 = <&pinctrl_regulator_usbh_pwr>; 42 regulator-name = "usb_host_vbus"; 43 regulator-min-microvolt = <5000000>; 44 regulator-max-microvolt = <5000000>; 45 gpio = <&gpio3 31 GPIO_ACTIVE_LOW>; /* USBH_PEN */ 46 }; 47}; 48 49/* 50 * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and 51 * touch screen controller 52 */ 53&i2c2 { 54 clock-frequency = <100000>; 55 pinctrl-names = "default"; 56 pinctrl-0 = <&pinctrl_i2c2>; 57 status = "okay"; 58 59 pmic: pfuze100@8 { 60 compatible = "fsl,pfuze100"; 61 reg = <0x08>; 62 63 regulators { 64 sw1a_reg: sw1ab { 65 regulator-min-microvolt = <300000>; 66 regulator-max-microvolt = <1875000>; 67 regulator-boot-on; 68 regulator-always-on; 69 regulator-ramp-delay = <6250>; 70 }; 71 72 sw1c_reg: sw1c { 73 regulator-min-microvolt = <300000>; 74 regulator-max-microvolt = <1875000>; 75 regulator-boot-on; 76 regulator-always-on; 77 regulator-ramp-delay = <6250>; 78 }; 79 80 sw3a_reg: sw3a { 81 regulator-min-microvolt = <400000>; 82 regulator-max-microvolt = <1975000>; 83 regulator-boot-on; 84 regulator-always-on; 85 }; 86 87 swbst_reg: swbst { 88 regulator-min-microvolt = <5000000>; 89 regulator-max-microvolt = <5150000>; 90 regulator-boot-on; 91 regulator-always-on; 92 }; 93 94 snvs_reg: vsnvs { 95 regulator-min-microvolt = <1000000>; 96 regulator-max-microvolt = <3000000>; 97 regulator-boot-on; 98 regulator-always-on; 99 }; 100 101 vref_reg: vrefddr { 102 regulator-boot-on; 103 regulator-always-on; 104 }; 105 106 /* vgen1: unused */ 107 108 vgen2_reg: vgen2 { 109 regulator-min-microvolt = <800000>; 110 regulator-max-microvolt = <1550000>; 111 regulator-boot-on; 112 regulator-always-on; 113 }; 114 115 /* vgen3: unused */ 116 117 vgen4_reg: vgen4 { 118 regulator-min-microvolt = <1800000>; 119 regulator-max-microvolt = <1800000>; 120 regulator-boot-on; 121 regulator-always-on; 122 }; 123 124 vgen5_reg: vgen5 { 125 regulator-min-microvolt = <1800000>; 126 regulator-max-microvolt = <3300000>; 127 regulator-boot-on; 128 regulator-always-on; 129 }; 130 131 vgen6_reg: vgen6 { 132 regulator-min-microvolt = <1800000>; 133 regulator-max-microvolt = <3300000>; 134 regulator-boot-on; 135 regulator-always-on; 136 }; 137 }; 138 }; 139}; 140 141/* 142 * I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board) 143 */ 144&i2c3 { 145 clock-frequency = <100000>; 146 pinctrl-names = "default", "gpio"; 147 pinctrl-0 = <&pinctrl_i2c3>; 148 pinctrl-1 = <&pinctrl_i2c3_recovery>; 149 scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 150 sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 151 status = "okay"; 152}; 153 154/* Colibri UART_A */ 155&uart1 { 156 pinctrl-names = "default"; 157 pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>; 158 fsl,dte-mode; 159 uart-has-rtscts; 160 status = "okay"; 161}; 162 163/* Colibri UART_B */ 164&uart2 { 165 pinctrl-names = "default"; 166 pinctrl-0 = <&pinctrl_uart2_dte>; 167 fsl,dte-mode; 168 uart-has-rtscts; 169 status = "okay"; 170}; 171 172/* Colibri UART_C */ 173&uart3 { 174 pinctrl-names = "default"; 175 pinctrl-0 = <&pinctrl_uart3_dte>; 176 fsl,dte-mode; 177 status = "okay"; 178}; 179 180/* Colibri USBH */ 181&usbh1 { 182 dr_mode = "host"; 183 vbus-supply = <®_usb_host_vbus>; 184 status = "okay"; 185}; 186 187/* Colibri USBC */ 188&usbotg { 189 dr_mode = "host"; 190 status = "okay"; 191}; 192 193/* Colibri MMC */ 194&usdhc1 { 195 pinctrl-names = "default"; 196 pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>; 197 cd-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */ 198 disable-wp; 199 vqmmc-supply = <®_module_3v3>; 200 bus-width = <4>; 201 no-1-8-v; 202 status = "okay"; 203}; 204 205/* eMMC */ 206&usdhc3 { 207 pinctrl-names = "default"; 208 pinctrl-0 = <&pinctrl_usdhc3>; 209 vqmmc-supply = <®_module_3v3>; 210 bus-width = <8>; 211 no-1-8-v; 212 non-removable; 213 status = "okay"; 214}; 215 216&iomuxc { 217 pinctrl_ecspi4: ecspi4grp { 218 fsl,pins = < 219 MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1 220 MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1 221 MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1 222 /* SPI CS */ 223 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x000b1 224 >; 225 }; 226 227 pinctrl_enet: enetgrp { 228 fsl,pins = < 229 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 230 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 231 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 232 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 233 MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 234 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 235 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 236 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 237 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 238 MX6QDL_PAD_GPIO_16__ENET_REF_CLK ((1<<30) | 0x1b0b0) 239 >; 240 }; 241 242 pinctrl_gpio_bl_on: gpioblon { 243 fsl,pins = < 244 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0 245 >; 246 }; 247 248 pinctrl_hdmi_ddc: hdmiddcgrp { 249 fsl,pins = < 250 MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1 251 MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1 252 >; 253 }; 254 255 pinctrl_i2c2: i2c2grp { 256 fsl,pins = < 257 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 258 MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1 259 >; 260 }; 261 262 pinctrl_i2c3: i2c3grp { 263 fsl,pins = < 264 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 265 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 266 >; 267 }; 268 269 pinctrl_i2c3_recovery: i2c3recoverygrp { 270 fsl,pins = < 271 MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x4001b8b1 272 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1 273 >; 274 }; 275 276 pinctrl_ipu1_lcdif: ipu1lcdifgrp { 277 fsl,pins = < 278 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0xa1 279 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0xa1 280 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0xa1 281 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0xa1 282 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0xa1 283 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0xa1 284 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0xa1 285 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0xa1 286 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0xa1 287 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0xa1 288 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0xa1 289 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0xa1 290 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0xa1 291 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0xa1 292 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0xa1 293 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0xa1 294 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0xa1 295 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0xa1 296 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0xa1 297 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0xa1 298 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0xa1 299 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0xa1 300 >; 301 }; 302 303 pinctrl_mmc_cd: gpiommccd { 304 fsl,pins = < 305 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b1 306 >; 307 }; 308 309 pinctrl_pwm1: pwm1grp { 310 fsl,pins = < 311 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 312 >; 313 }; 314 315 pinctrl_pwm2: pwm2grp { 316 fsl,pins = < 317 MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1 318 MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x00040 319 >; 320 }; 321 322 pinctrl_pwm3: pwm3grp { 323 fsl,pins = < 324 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 325 MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x00040 326 >; 327 }; 328 329 pinctrl_pwm4: pwm4grp { 330 fsl,pins = < 331 MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1 332 >; 333 }; 334 335 pinctrl_regulator_usbh_pwr: gpioregusbhpwrgrp { 336 fsl,pins = < 337 /* SODIMM 129 USBH_PEN */ 338 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x0f058 339 >; 340 }; 341 342 pinctrl_uart1_dce: uart1dcegrp { 343 fsl,pins = < 344 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 345 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 346 >; 347 }; 348 349 /* DTE mode */ 350 pinctrl_uart1_dte: uart1dtegrp { 351 fsl,pins = < 352 MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x1b0b1 353 MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x1b0b1 354 MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x1b0b1 355 MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x1b0b1 356 >; 357 }; 358 359 /* Additional DTR, DSR, DCD */ 360 pinctrl_uart1_ctrl: uart1ctrlgrp { 361 fsl,pins = < 362 MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0 363 MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0 364 MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0 365 >; 366 }; 367 368 pinctrl_uart2_dte: uart2dtegrp { 369 fsl,pins = < 370 MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA 0x1b0b1 371 MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1 372 MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1 373 MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x1b0b1 374 >; 375 }; 376 377 pinctrl_uart3_dte: uart3dtegrp { 378 fsl,pins = < 379 MX6QDL_PAD_SD4_CLK__UART3_TX_DATA 0x1b0b1 380 MX6QDL_PAD_SD4_CMD__UART3_RX_DATA 0x1b0b1 381 >; 382 }; 383 384 pinctrl_usdhc1: usdhc1grp { 385 fsl,pins = < 386 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 387 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 388 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 389 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 390 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 391 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 392 >; 393 }; 394 395 pinctrl_usdhc3: usdhc3grp { 396 fsl,pins = < 397 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 398 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 399 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 400 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 401 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 402 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 403 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 404 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 405 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 406 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 407 /* eMMC reset */ 408 MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059 409 >; 410 }; 411}; 412