1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * DHCOM DH-iMX6 PDK board support
4 *
5 * Copyright (C) 2017 Marek Vasut <marex@denx.de>
6 */
7
8 #include <common.h>
9 #include <dm.h>
10 #include <eeprom.h>
11 #include <init.h>
12 #include <dm/device-internal.h>
13 #include <asm/arch/clock.h>
14 #include <asm/arch/crm_regs.h>
15 #include <asm/arch/imx-regs.h>
16 #include <asm/arch/iomux.h>
17 #include <asm/arch/mx6-pins.h>
18 #include <asm/arch/sys_proto.h>
19 #include <asm/gpio.h>
20 #include <asm/io.h>
21 #include <asm/mach-imx/boot_mode.h>
22 #include <asm/mach-imx/iomux-v3.h>
23 #include <asm/mach-imx/sata.h>
24 #include <ahci.h>
25 #include <dwc_ahsata.h>
26 #include <env.h>
27 #include <errno.h>
28 #include <fsl_esdhc_imx.h>
29 #include <fuse.h>
30 #include <i2c_eeprom.h>
31 #include <miiphy.h>
32 #include <mmc.h>
33 #include <net.h>
34 #include <netdev.h>
35 #include <usb.h>
36 #include <usb/ehci-ci.h>
37
38 DECLARE_GLOBAL_DATA_PTR;
39
dram_init(void)40 int dram_init(void)
41 {
42 gd->ram_size = imx_ddr_size();
43 return 0;
44 }
45
46 /*
47 * Do not overwrite the console
48 * Use always serial for U-Boot console
49 */
overwrite_console(void)50 int overwrite_console(void)
51 {
52 return 1;
53 }
54
55 #ifdef CONFIG_FEC_MXC
eth_phy_reset(void)56 static void eth_phy_reset(void)
57 {
58 /* Reset PHY */
59 gpio_direction_output(IMX_GPIO_NR(5, 0) , 0);
60 udelay(500);
61 gpio_set_value(IMX_GPIO_NR(5, 0), 1);
62
63 /* Enable VIO */
64 gpio_direction_output(IMX_GPIO_NR(1, 7) , 0);
65
66 /*
67 * KSZ9021 PHY needs at least 10 mSec after PHY reset
68 * is released to stabilize
69 */
70 mdelay(10);
71 }
72
setup_fec_clock(void)73 static int setup_fec_clock(void)
74 {
75 struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
76
77 /* set gpr1[21] to select anatop clock */
78 clrsetbits_le32(&iomuxc_regs->gpr[1], 0x1 << 21, 0x1 << 21);
79
80 return enable_fec_anatop_clock(0, ENET_50MHZ);
81 }
82
board_eth_init(bd_t * bis)83 int board_eth_init(bd_t *bis)
84 {
85 uint32_t base = IMX_FEC_BASE;
86 struct mii_dev *bus = NULL;
87 struct phy_device *phydev = NULL;
88
89 gpio_request(IMX_GPIO_NR(5, 0), "PHY-reset");
90 gpio_request(IMX_GPIO_NR(1, 7), "VIO");
91
92 setup_fec_clock();
93
94 eth_phy_reset();
95
96 bus = fec_get_miibus(base, -1);
97 if (!bus)
98 return -EINVAL;
99
100 /* Scan PHY 0 */
101 phydev = phy_find_by_mask(bus, 0xf, PHY_INTERFACE_MODE_RGMII);
102 if (!phydev) {
103 printf("Ethernet PHY not found!\n");
104 return -EINVAL;
105 }
106
107 return fec_probe(bis, -1, base, bus, phydev);
108 }
109 #endif
110
111 #ifdef CONFIG_USB_EHCI_MX6
setup_usb(void)112 static void setup_usb(void)
113 {
114 /*
115 * Set daisy chain for otg_pin_id on MX6Q.
116 * For MX6DL, this bit is reserved.
117 */
118 imx_iomux_set_gpr_register(1, 13, 1, 0);
119 }
120
board_usb_phy_mode(int port)121 int board_usb_phy_mode(int port)
122 {
123 if (port == 1)
124 return USB_INIT_HOST;
125 else
126 return USB_INIT_DEVICE;
127 }
128 #endif
129
setup_dhcom_mac_from_fuse(void)130 static int setup_dhcom_mac_from_fuse(void)
131 {
132 struct udevice *dev;
133 ofnode eeprom;
134 unsigned char enetaddr[6];
135 int ret;
136
137 ret = eth_env_get_enetaddr("ethaddr", enetaddr);
138 if (ret) /* ethaddr is already set */
139 return 0;
140
141 imx_get_mac_from_fuse(0, enetaddr);
142
143 if (is_valid_ethaddr(enetaddr)) {
144 eth_env_set_enetaddr("ethaddr", enetaddr);
145 return 0;
146 }
147
148 eeprom = ofnode_path("/soc/aips-bus@2100000/i2c@21a8000/eeprom@50");
149 if (!ofnode_valid(eeprom)) {
150 printf("Invalid hardware path to EEPROM!\n");
151 return -ENODEV;
152 }
153
154 ret = uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, eeprom, &dev);
155 if (ret) {
156 printf("Cannot find EEPROM!\n");
157 return ret;
158 }
159
160 ret = i2c_eeprom_read(dev, 0xfa, enetaddr, 0x6);
161 if (ret) {
162 printf("Error reading configuration EEPROM!\n");
163 return ret;
164 }
165
166 if (is_valid_ethaddr(enetaddr))
167 eth_env_set_enetaddr("ethaddr", enetaddr);
168
169 return 0;
170 }
171
board_early_init_f(void)172 int board_early_init_f(void)
173 {
174 #ifdef CONFIG_USB_EHCI_MX6
175 setup_usb();
176 #endif
177
178 return 0;
179 }
180
board_init(void)181 int board_init(void)
182 {
183 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
184
185 /* address of boot parameters */
186 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
187
188 /* Enable eim_slow clocks */
189 setbits_le32(&mxc_ccm->CCGR6, 0x1 << MXC_CCM_CCGR6_EMI_SLOW_OFFSET);
190
191 setup_dhcom_mac_from_fuse();
192
193 return 0;
194 }
195
196 #ifdef CONFIG_CMD_BMODE
197 static const struct boot_mode board_boot_modes[] = {
198 /* 4 bit bus width */
199 {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)},
200 {"sd3", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
201 /* 8 bit bus width */
202 {"emmc", MAKE_CFGVAL(0x60, 0x58, 0x00, 0x00)},
203 {NULL, 0},
204 };
205 #endif
206
207 #define HW_CODE_BIT_0 IMX_GPIO_NR(2, 19)
208 #define HW_CODE_BIT_1 IMX_GPIO_NR(6, 6)
209 #define HW_CODE_BIT_2 IMX_GPIO_NR(2, 16)
210
board_get_hwcode(void)211 static int board_get_hwcode(void)
212 {
213 int hw_code;
214
215 gpio_request(HW_CODE_BIT_0, "HW-code-bit-0");
216 gpio_request(HW_CODE_BIT_1, "HW-code-bit-1");
217 gpio_request(HW_CODE_BIT_2, "HW-code-bit-2");
218
219 gpio_direction_input(HW_CODE_BIT_0);
220 gpio_direction_input(HW_CODE_BIT_1);
221 gpio_direction_input(HW_CODE_BIT_2);
222
223 /* HW 100 + HW 200 = 00b; HW 300 = 01b */
224 hw_code = ((gpio_get_value(HW_CODE_BIT_2) << 2) |
225 (gpio_get_value(HW_CODE_BIT_1) << 1) |
226 gpio_get_value(HW_CODE_BIT_0)) + 2;
227
228 return hw_code;
229 }
230
board_late_init(void)231 int board_late_init(void)
232 {
233 u32 hw_code;
234 char buf[16];
235
236 hw_code = board_get_hwcode();
237
238 switch (get_cpu_type()) {
239 case MXC_CPU_MX6SOLO:
240 snprintf(buf, sizeof(buf), "imx6s-dhcom%1d", hw_code);
241 break;
242 case MXC_CPU_MX6DL:
243 snprintf(buf, sizeof(buf), "imx6dl-dhcom%1d", hw_code);
244 break;
245 case MXC_CPU_MX6D:
246 snprintf(buf, sizeof(buf), "imx6d-dhcom%1d", hw_code);
247 break;
248 case MXC_CPU_MX6Q:
249 snprintf(buf, sizeof(buf), "imx6q-dhcom%1d", hw_code);
250 break;
251 default:
252 snprintf(buf, sizeof(buf), "UNKNOWN%1d", hw_code);
253 break;
254 }
255
256 env_set("dhcom", buf);
257
258 #ifdef CONFIG_CMD_BMODE
259 add_board_boot_modes(board_boot_modes);
260 #endif
261 return 0;
262 }
263
checkboard(void)264 int checkboard(void)
265 {
266 puts("Board: DHCOM i.MX6\n");
267 return 0;
268 }
269
270 #ifdef CONFIG_MULTI_DTB_FIT
board_fit_config_name_match(const char * name)271 int board_fit_config_name_match(const char *name)
272 {
273 if (is_mx6dq()) {
274 if (!strcmp(name, "imx6q-dhcom-pdk2"))
275 return 0;
276 } else if (is_mx6sdl()) {
277 if (!strcmp(name, "imx6dl-dhcom-pdk2"))
278 return 0;
279 }
280
281 return -1;
282 }
283 #endif
284