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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2019
4  * shuyiqi <shuyiqi@phytium.com.cn>
5  * liuhao  <liuhao@phytium.com.cn>
6  */
7 
8 #include <common.h>
9 #include <asm/armv8/mmu.h>
10 #include <asm/system.h>
11 #include <asm/io.h>
12 #include <linux/arm-smccc.h>
13 #include <linux/kernel.h>
14 #include <scsi.h>
15 #include "cpu.h"
16 
17 DECLARE_GLOBAL_DATA_PTR;
18 
dram_init(void)19 int dram_init(void)
20 {
21 	gd->mem_clk = 0;
22 	gd->ram_size = PHYS_SDRAM_1_SIZE;
23 	return 0;
24 }
25 
dram_init_banksize(void)26 int dram_init_banksize(void)
27 {
28 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
29 	gd->bd->bi_dram[0].size =  PHYS_SDRAM_1_SIZE;
30 
31 	return 0;
32 }
33 
board_init(void)34 int board_init(void)
35 {
36 	return 0;
37 }
38 
reset_cpu(ulong addr)39 void reset_cpu(ulong addr)
40 {
41 	struct arm_smccc_res res;
42 
43 	arm_smccc_smc(0x84000009, 0, 0, 0, 0, 0, 0, 0, &res);
44 	debug("reset cpu error, %lx\n", res.a0);
45 }
46 
47 static struct mm_region durian_mem_map[] = {
48 	{
49 		.virt = 0x0UL,
50 		.phys = 0x0UL,
51 		.size = 0x80000000UL,
52 		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
53 				 PTE_BLOCK_NON_SHARE |
54 				 PTE_BLOCK_PXN |
55 				 PTE_BLOCK_UXN
56 	},
57 	{
58 		.virt = (u64)PHYS_SDRAM_1,
59 		.phys = (u64)PHYS_SDRAM_1,
60 		.size = (u64)PHYS_SDRAM_1_SIZE,
61 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
62 				 PTE_BLOCK_NS |
63 				 PTE_BLOCK_INNER_SHARE
64 	},
65 	{
66 		0,
67 	}
68 };
69 
70 struct mm_region *mem_map = durian_mem_map;
71 
print_cpuinfo(void)72 int print_cpuinfo(void)
73 {
74 	printf("CPU: Phytium ft2004 %ld MHz\n", gd->cpu_clk);
75 	return 0;
76 }
77 
__asm_flush_l3_dcache(void)78 int __asm_flush_l3_dcache(void)
79 {
80 	int i, pstate;
81 
82 	for (i = 0; i < HNF_COUNT; i++)
83 		writeq(HNF_PSTATE_SFONLY, HNF_PSTATE_REQ + i * HNF_STRIDE);
84 	for (i = 0; i < HNF_COUNT; i++) {
85 		do {
86 			pstate = readq(HNF_PSTATE_STAT + i * HNF_STRIDE);
87 		} while ((pstate & 0xf) != (HNF_PSTATE_SFONLY << 2));
88 	}
89 
90 	for (i = 0; i < HNF_COUNT; i++)
91 		writeq(HNF_PSTATE_FULL, HNF_PSTATE_REQ + i * HNF_STRIDE);
92 
93 	return 0;
94 }
95 
last_stage_init(void)96 int last_stage_init(void)
97 {
98 	int ret;
99 
100 	/* pci e */
101 	pci_init();
102 	/* scsi scan */
103 	ret = scsi_scan(true);
104 	if (ret) {
105 		printf("scsi scan failed\n");
106 		return CMD_RET_FAILURE;
107 	}
108 	return ret;
109 }
110 
111