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1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Config file for Compulab CM-FX6 board
4  *
5  * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
6  *
7  * Author: Nikita Kiryanov <nikita@compulab.co.il>
8  */
9 
10 #ifndef __CONFIG_CM_FX6_H
11 #define __CONFIG_CM_FX6_H
12 
13 #include "mx6_common.h"
14 
15 /* Machine config */
16 #define CONFIG_SYS_LITTLE_ENDIAN
17 #define CONFIG_MACH_TYPE		4273
18 
19 /* MMC */
20 #define CONFIG_SYS_FSL_USDHC_NUM	3
21 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR
22 
23 /* RAM */
24 #define PHYS_SDRAM_1			MMDC0_ARB_BASE_ADDR
25 #define PHYS_SDRAM_2			MMDC1_ARB_BASE_ADDR
26 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
27 #define CONFIG_SYS_MEMTEST_START	0x10000000
28 #define CONFIG_SYS_MEMTEST_END		0x10010000
29 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
30 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
31 #define CONFIG_SYS_INIT_SP_OFFSET \
32 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
33 #define CONFIG_SYS_INIT_SP_ADDR \
34 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
35 
36 /* Serial console */
37 #define CONFIG_MXC_UART
38 #define CONFIG_MXC_UART_BASE		UART4_BASE
39 #define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}
40 
41 /* Environment */
42 
43 #ifndef CONFIG_SPL_BUILD
44 #define CONFIG_EXTRA_ENV_SETTINGS \
45 	"fdt_high=0xffffffff\0" \
46 	"initrd_high=0xffffffff\0" \
47 	"fdt_addr_r=0x18000000\0" \
48 	"ramdisk_addr_r=0x13000000\0" \
49 	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
50 	"pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
51 	"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
52 	"fdtfile=undefined\0" \
53 	"stdin=serial,usbkbd\0" \
54 	"stdout=serial,vga\0" \
55 	"stderr=serial,vga\0" \
56 	"panel=HDMI\0" \
57 	"autoload=no\0" \
58 	"uImage=uImage-cm-fx6\0" \
59 	"zImage=zImage-cm-fx6\0" \
60 	"kernel=uImage-cm-fx6\0" \
61 	"dtb=cm-fx6.dtb\0" \
62 	"console=ttymxc3,115200\0" \
63 	"ethprime=FEC0\0" \
64 	"video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
65 	"video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
66 	"doboot=bootm ${kernel_addr_r}\0" \
67 	"doloadfdt=false\0" \
68 	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
69 	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
70 	"setboottypez=setenv kernel ${zImage};" \
71 		"setenv doboot bootz ${kernel_addr_r} - ${fdt_addr_r};" \
72 		"setenv doloadfdt true;\0" \
73 	"setboottypem=setenv kernel ${uImage};" \
74 		"setenv doboot bootm ${kernel_addr_r};" \
75 		"setenv doloadfdt false;\0"\
76 	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
77 	"sataroot=/dev/sda2 rw rootwait\0" \
78 	"nandroot=/dev/mtdblock4 rw\0" \
79 	"nandrootfstype=ubifs\0" \
80 	"mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
81 		"${video} ${extrabootargs}\0" \
82 	"sataargs=setenv bootargs console=${console} root=${sataroot} " \
83 		"${video} ${extrabootargs}\0" \
84 	"nandargs=setenv bootargs console=${console} " \
85 		"root=${nandroot} " \
86 		"rootfstype=${nandrootfstype} " \
87 		"${video} ${extrabootargs}\0" \
88 	"nandboot=if run nandloadkernel; then " \
89 			"run nandloadfdt;" \
90 			"run setboottypem;" \
91 			"run storagebootcmd;" \
92 			"run setboottypez;" \
93 			"run storagebootcmd;" \
94 		"fi;\0" \
95 	"run_eboot=echo Starting EBOOT ...; "\
96 		"mmc dev 2 && " \
97 		"mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
98 	"loadkernel=load ${storagetype} ${storagedev} ${kernel_addr_r} ${kernel};\0"\
99 	"loadfdt=load ${storagetype} ${storagedev} ${fdt_addr_r} ${dtb};\0" \
100 	"nandloadkernel=nand read ${kernel_addr_r} 0 780000;\0" \
101 	"nandloadfdt=nand read ${fdt_addr_r} 780000 80000;\0" \
102 	"setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
103 	"setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
104 	"setupnandboot=setenv storagetype nand;\0" \
105 	"storagebootcmd=echo Booting from ${storagetype} ...;" \
106 			"run ${storagetype}args; run doboot;\0" \
107 	"trybootk=if run loadkernel; then " \
108 		"if ${doloadfdt}; then " \
109 			"run loadfdt;" \
110 		"fi;" \
111 		"run storagebootcmd;" \
112 		"fi;\0" \
113 	"trybootsmz=" \
114 		"run setboottypem;" \
115 		"run trybootk;" \
116 		"run setboottypez;" \
117 		"run trybootk;\0" \
118 	"legacy_bootcmd=" \
119 		"run setupmmcboot;" \
120 		"mmc dev ${storagedev};" \
121 		"if mmc rescan; then " \
122 			"run trybootsmz;" \
123 		"fi;" \
124 		"run setupsataboot;" \
125 		"if sata init; then " \
126 			"run trybootsmz;" \
127 		"fi;" \
128 		"run setupnandboot;" \
129 		"run nandboot;\0" \
130 	"findfdt="\
131 		"if test $board_name = Utilite && test $board_rev = MX6Q ; then " \
132 			"setenv fdtfile imx6q-utilite-pro.dtb; fi; " \
133 		"if test $fdtfile = undefined; then " \
134 			"echo WARNING: Could not determine dtb to use; fi; \0" \
135 	BOOTENV
136 
137 #define BOOT_TARGET_DEVICES(func) \
138 	func(USB, usb, 0) \
139 	func(MMC, mmc, 2) \
140 	func(SATA, sata, 0)
141 
142 #include <config_distro_bootcmd.h>
143 #else
144 #define CONFIG_EXTRA_ENV_SETTINGS
145 #endif
146 
147 /* NAND */
148 #ifndef CONFIG_SPL_BUILD
149 #define CONFIG_SYS_NAND_BASE		0x40000000
150 #define CONFIG_SYS_NAND_MAX_CHIPS	1
151 #define CONFIG_SYS_MAX_NAND_DEVICE	1
152 #define CONFIG_SYS_NAND_ONFI_DETECTION
153 /* APBH DMA is required for NAND support */
154 #endif
155 
156 /* Ethernet */
157 #define CONFIG_FEC_MXC
158 #define CONFIG_FEC_MXC_PHYADDR		0
159 #define CONFIG_FEC_XCV_TYPE		RGMII
160 #define IMX_FEC_BASE			ENET_BASE_ADDR
161 #define CONFIG_PHY_ATHEROS
162 #define CONFIG_ETHPRIME			"FEC0"
163 #define CONFIG_ARP_TIMEOUT		200UL
164 #define CONFIG_NET_RETRY_COUNT		5
165 
166 /* USB */
167 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
168 #define CONFIG_MXC_USB_FLAGS		0
169 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
170 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */
171 
172 /* I2C */
173 #define CONFIG_SYS_I2C
174 #define CONFIG_SYS_I2C_MXC
175 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
176 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
177 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
178 #define CONFIG_SYS_I2C_SPEED		100000
179 #define CONFIG_SYS_MXC_I2C3_SPEED	400000
180 
181 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
182 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
183 #define CONFIG_SYS_I2C_EEPROM_BUS	2
184 
185 /* SATA */
186 #define CONFIG_SYS_SATA_MAX_DEVICE	1
187 #define CONFIG_LBA48
188 #define CONFIG_DWC_AHSATA_PORT_ID	0
189 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
190 
191 /* Boot */
192 #define CONFIG_SYS_BOOTMAPSZ	        (8 << 20)
193 #define CONFIG_SERIAL_TAG
194 
195 /* misc */
196 #define CONFIG_SYS_MALLOC_LEN			(10 * 1024 * 1024)
197 
198 /* SPL */
199 #include "imx6_spl.h"
200 
201 /* Display */
202 #define CONFIG_IMX_HDMI
203 
204 #define CONFIG_SPLASH_SCREEN
205 #define CONFIG_SPLASH_SOURCE
206 #define CONFIG_VIDEO_BMP_RLE8
207 
208 #define CONFIG_VIDEO_LOGO
209 #define CONFIG_VIDEO_BMP_LOGO
210 
211 /* EEPROM */
212 #define CONFIG_ENV_EEPROM_IS_ON_I2C
213 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
214 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
215 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
216 #define CONFIG_SYS_EEPROM_SIZE			256
217 
218 #endif	/* __CONFIG_CM_FX6_H */
219