Lines Matching refs:cond
971 inline vixl32::Condition ARMCondition(IfCondition cond) { in ARMCondition() argument
972 switch (cond) { in ARMCondition()
989 inline vixl32::Condition ARMUnsignedCondition(IfCondition cond) { in ARMUnsignedCondition() argument
990 switch (cond) { in ARMUnsignedCondition()
1008 inline vixl32::Condition ARMFPCondition(IfCondition cond, bool gt_bias) { in ARMFPCondition() argument
1013 switch (cond) { in ARMFPCondition()
1332 IfCondition cond = condition->GetCondition(); in GenerateLongTestConstant() local
1336 std::swap(cond, opposite); in GenerateLongTestConstant()
1347 int64_t value = AdjustConstantForCondition(Int64ConstantFrom(right), &cond, &opposite); in GenerateLongTestConstant()
1352 switch (cond) { in GenerateLongTestConstant()
1366 return std::make_pair(ARMCondition(cond), ARMCondition(opposite)); in GenerateLongTestConstant()
1379 switch (cond) { in GenerateLongTestConstant()
1406 ret = std::make_pair(ARMUnsignedCondition(cond), ARMUnsignedCondition(opposite)); in GenerateLongTestConstant()
1414 ret = cond == kCondLE ? std::make_pair(eq, ne) : std::make_pair(ne, eq); in GenerateLongTestConstant()
1418 if (cond == kCondLE) { in GenerateLongTestConstant()
1420 cond = kCondLT; in GenerateLongTestConstant()
1423 DCHECK_EQ(cond, kCondGT); in GenerateLongTestConstant()
1425 cond = kCondGE; in GenerateLongTestConstant()
1435 ret = std::make_pair(ARMCondition(cond), ARMCondition(opposite)); in GenerateLongTestConstant()
1453 IfCondition cond = condition->GetCondition(); in GenerateLongTest() local
1457 std::swap(cond, opposite); in GenerateLongTest()
1466 switch (cond) { in GenerateLongTest()
1482 ret = std::make_pair(ARMUnsignedCondition(cond), ARMUnsignedCondition(opposite)); in GenerateLongTest()
1487 if (cond == kCondLE) { in GenerateLongTest()
1489 cond = kCondGE; in GenerateLongTest()
1492 DCHECK_EQ(cond, kCondGT); in GenerateLongTest()
1494 cond = kCondLT; in GenerateLongTest()
1506 ret = std::make_pair(ARMCondition(cond), ARMCondition(opposite)); in GenerateLongTest()
1521 IfCondition cond = condition->GetCondition(); in GenerateTest() local
1526 std::swap(cond, opposite); in GenerateTest()
1536 ret = std::make_pair(ARMFPCondition(cond, condition->IsGtBias()), in GenerateTest()
1541 ret = std::make_pair(ARMCondition(cond), ARMCondition(opposite)); in GenerateTest()
1547 static void GenerateConditionGeneric(HCondition* cond, CodeGeneratorARMVIXL* codegen) { in GenerateConditionGeneric() argument
1548 const vixl32::Register out = OutputRegister(cond); in GenerateConditionGeneric()
1549 const auto condition = GenerateTest(cond, false, codegen); in GenerateConditionGeneric()
1563 vixl32::Label* const final_label = codegen->GetFinalLabel(cond, &done_label); in GenerateConditionGeneric()
1574 static void GenerateEqualLong(HCondition* cond, CodeGeneratorARMVIXL* codegen) { in GenerateEqualLong() argument
1575 DCHECK_EQ(cond->GetLeft()->GetType(), DataType::Type::kInt64); in GenerateEqualLong()
1577 const LocationSummary* const locations = cond->GetLocations(); in GenerateEqualLong()
1578 IfCondition condition = cond->GetCondition(); in GenerateEqualLong()
1579 const vixl32::Register out = OutputRegister(cond); in GenerateEqualLong()
1588 IfCondition opposite = cond->GetOppositeCondition(); in GenerateEqualLong()
1630 static void GenerateConditionLong(HCondition* cond, CodeGeneratorARMVIXL* codegen) { in GenerateConditionLong() argument
1631 DCHECK_EQ(cond->GetLeft()->GetType(), DataType::Type::kInt64); in GenerateConditionLong()
1633 const LocationSummary* const locations = cond->GetLocations(); in GenerateConditionLong()
1634 IfCondition condition = cond->GetCondition(); in GenerateConditionLong()
1635 const vixl32::Register out = OutputRegister(cond); in GenerateConditionLong()
1640 IfCondition opposite = cond->GetOppositeCondition(); in GenerateConditionLong()
1687 GenerateEqualLong(cond, codegen); in GenerateConditionLong()
1691 GenerateConditionGeneric(cond, codegen); in GenerateConditionLong()
1694 static void GenerateConditionIntegralOrNonPrimitive(HCondition* cond, in GenerateConditionIntegralOrNonPrimitive() argument
1696 const DataType::Type type = cond->GetLeft()->GetType(); in GenerateConditionIntegralOrNonPrimitive()
1701 GenerateConditionLong(cond, codegen); in GenerateConditionIntegralOrNonPrimitive()
1705 IfCondition condition = cond->GetCondition(); in GenerateConditionIntegralOrNonPrimitive()
1706 vixl32::Register in = InputRegisterAt(cond, 0); in GenerateConditionIntegralOrNonPrimitive()
1707 const vixl32::Register out = OutputRegister(cond); in GenerateConditionIntegralOrNonPrimitive()
1708 const Location right = cond->GetLocations()->InAt(1); in GenerateConditionIntegralOrNonPrimitive()
1712 IfCondition opposite = cond->GetOppositeCondition(); in GenerateConditionIntegralOrNonPrimitive()
1758 operand = InputOperandAt(cond, 0); in GenerateConditionIntegralOrNonPrimitive()
1761 operand = InputOperandAt(cond, 1); in GenerateConditionIntegralOrNonPrimitive()
1782 GenerateConditionGeneric(cond, codegen); in GenerateConditionIntegralOrNonPrimitive()
2706 const auto cond = GenerateTest(condition, invert, codegen_); in GenerateCompareTestAndBranch() local
2708 __ B(cond.first, non_fallthrough_target, is_far_target); in GenerateCompareTestAndBranch()
2721 HInstruction* cond = instruction->InputAt(condition_input_index); in GenerateTestAndBranch() local
2726 } else if (cond->IsIntConstant()) { in GenerateTestAndBranch()
2728 if (cond->AsIntConstant()->IsTrue()) { in GenerateTestAndBranch()
2733 DCHECK(cond->AsIntConstant()->IsFalse()) << Int32ConstantFrom(cond); in GenerateTestAndBranch()
2749 if (IsBooleanValueOrMaterializedCondition(cond)) { in GenerateTestAndBranch()
2767 HCondition* condition = cond->AsCondition(); in GenerateTestAndBranch()
2779 const vixl32::Register left = InputRegisterAt(cond, 0); in GenerateTestAndBranch()
2780 const Operand right = InputOperandAt(cond, 1); in GenerateTestAndBranch()
2944 std::pair<vixl32::Condition, vixl32::Condition> cond(eq, ne); in VisitSelect() local
2948 cond = invert ? std::make_pair(eq, ne) : std::make_pair(ne, eq); in VisitSelect()
2950 cond = GenerateTest(condition->AsCondition(), invert, codegen_); in VisitSelect()
2960 __ it(cond.first); in VisitSelect()
2961 __ mov(cond.first, RegisterFrom(out), OperandFrom(src, type)); in VisitSelect()
2979 __ it(cond.first); in VisitSelect()
2980 __ mov(cond.first, LowRegisterFrom(out), operand_low); in VisitSelect()
2981 __ it(cond.first); in VisitSelect()
2982 __ mov(cond.first, HighRegisterFrom(out), operand_high); in VisitSelect()
3123 void LocationsBuilderARMVIXL::HandleCondition(HCondition* cond) { in HandleCondition() argument
3125 new (GetGraph()->GetAllocator()) LocationSummary(cond, LocationSummary::kNoCall); in HandleCondition()
3126 const DataType::Type type = cond->InputAt(0)->GetType(); in HandleCondition()
3129 locations->SetInAt(1, ArithmeticZeroOrFpuRegister(cond->InputAt(1))); in HandleCondition()
3132 locations->SetInAt(1, Location::RegisterOrConstant(cond->InputAt(1))); in HandleCondition()
3134 if (!cond->IsEmittedAtUseSite()) { in HandleCondition()
3139 void InstructionCodeGeneratorARMVIXL::HandleCondition(HCondition* cond) { in HandleCondition() argument
3140 if (cond->IsEmittedAtUseSite()) { in HandleCondition()
3144 const DataType::Type type = cond->GetLeft()->GetType(); in HandleCondition()
3147 GenerateConditionGeneric(cond, codegen_); in HandleCondition()
3153 const IfCondition condition = cond->GetCondition(); in HandleCondition()
3159 cond->GetRight()->GetType() == DataType::Type::kBool && in HandleCondition()
3161 vixl32::Register left = InputRegisterAt(cond, 0); in HandleCondition()
3162 const vixl32::Register out = OutputRegister(cond); in HandleCondition()
3163 const Location right_loc = cond->GetLocations()->InAt(1); in HandleCondition()
3184 GenerateConditionIntegralOrNonPrimitive(cond, codegen_); in HandleCondition()
4785 vixl32::ConditionType cond = is_min ? ge : lt; in GenerateMinMaxLong() local
4789 __ itt(cond); in GenerateMinMaxLong()
4790 __ mov(cond, out_lo, op2_lo); in GenerateMinMaxLong()
4791 __ mov(cond, out_hi, op2_hi); in GenerateMinMaxLong()
4824 vixl32::ConditionType cond = is_min ? gt : lt; in GenerateMinMaxFloat() local
4829 __ it(cond); in GenerateMinMaxFloat()
4830 __ vmov(cond, F32, out, op2); in GenerateMinMaxFloat()
4881 vixl32::ConditionType cond = is_min ? gt : lt; in GenerateMinMaxDouble() local
4886 __ it(cond); in GenerateMinMaxDouble()
4887 __ vmov(cond, F64, out, op2); in GenerateMinMaxDouble()
6278 vixl32::Condition cond) { in LoadFromShiftedRegOffset() argument
6285 __ Ldrb(cond, RegisterFrom(out_loc), mem_address); in LoadFromShiftedRegOffset()
6288 __ Ldrsb(cond, RegisterFrom(out_loc), mem_address); in LoadFromShiftedRegOffset()
6291 __ Ldrh(cond, RegisterFrom(out_loc), mem_address); in LoadFromShiftedRegOffset()
6294 __ Ldrsh(cond, RegisterFrom(out_loc), mem_address); in LoadFromShiftedRegOffset()
6298 __ Ldr(cond, RegisterFrom(out_loc), mem_address); in LoadFromShiftedRegOffset()
6314 vixl32::Condition cond) { in StoreToShiftedRegOffset() argument
6322 __ Strb(cond, RegisterFrom(loc), mem_address); in StoreToShiftedRegOffset()
6326 __ Strh(cond, RegisterFrom(loc), mem_address); in StoreToShiftedRegOffset()
6330 __ Str(cond, RegisterFrom(loc), mem_address); in StoreToShiftedRegOffset()