Lines Matching refs:destination
1613 void CodeGeneratorX86_64::Move(Location destination, Location source) { in Move() argument
1614 if (source.Equals(destination)) { in Move()
1617 if (destination.IsRegister()) { in Move()
1618 CpuRegister dest = destination.AsRegister<CpuRegister>(); in Move()
1636 } else if (destination.IsFpuRegister()) { in Move()
1637 XmmRegister dest = destination.AsFpuRegister<XmmRegister>(); in Move()
1656 } else if (destination.IsStackSlot()) { in Move()
1658 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), in Move()
1661 __ movss(Address(CpuRegister(RSP), destination.GetStackIndex()), in Move()
1666 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), Immediate(value)); in Move()
1670 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP)); in Move()
1673 DCHECK(destination.IsDoubleStackSlot()); in Move()
1675 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), in Move()
1678 __ movsd(Address(CpuRegister(RSP), destination.GetStackIndex()), in Move()
1684 Store64BitValueToStack(destination, value); in Move()
1688 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP)); in Move()
5941 Location destination = move->GetDestination(); in EmitMove() local
5944 if (destination.IsRegister()) { in EmitMove()
5945 __ movq(destination.AsRegister<CpuRegister>(), source.AsRegister<CpuRegister>()); in EmitMove()
5946 } else if (destination.IsStackSlot()) { in EmitMove()
5947 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), in EmitMove()
5950 DCHECK(destination.IsDoubleStackSlot()); in EmitMove()
5951 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), in EmitMove()
5955 if (destination.IsRegister()) { in EmitMove()
5956 __ movl(destination.AsRegister<CpuRegister>(), in EmitMove()
5958 } else if (destination.IsFpuRegister()) { in EmitMove()
5959 __ movss(destination.AsFpuRegister<XmmRegister>(), in EmitMove()
5962 DCHECK(destination.IsStackSlot()); in EmitMove()
5964 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP)); in EmitMove()
5967 if (destination.IsRegister()) { in EmitMove()
5968 __ movq(destination.AsRegister<CpuRegister>(), in EmitMove()
5970 } else if (destination.IsFpuRegister()) { in EmitMove()
5971 __ movsd(destination.AsFpuRegister<XmmRegister>(), in EmitMove()
5974 DCHECK(destination.IsDoubleStackSlot()) << destination; in EmitMove()
5976 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP)); in EmitMove()
5979 if (destination.IsFpuRegister()) { in EmitMove()
5980 __ movups(destination.AsFpuRegister<XmmRegister>(), in EmitMove()
5983 DCHECK(destination.IsSIMDStackSlot()); in EmitMove()
5986 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP)); in EmitMove()
5988 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex() + high), CpuRegister(TMP)); in EmitMove()
5994 if (destination.IsRegister()) { in EmitMove()
5996 __ xorl(destination.AsRegister<CpuRegister>(), destination.AsRegister<CpuRegister>()); in EmitMove()
5998 __ movl(destination.AsRegister<CpuRegister>(), Immediate(value)); in EmitMove()
6001 DCHECK(destination.IsStackSlot()) << destination; in EmitMove()
6002 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), Immediate(value)); in EmitMove()
6006 if (destination.IsRegister()) { in EmitMove()
6007 codegen_->Load64BitValue(destination.AsRegister<CpuRegister>(), value); in EmitMove()
6009 DCHECK(destination.IsDoubleStackSlot()) << destination; in EmitMove()
6010 codegen_->Store64BitValueToStack(destination, value); in EmitMove()
6014 if (destination.IsFpuRegister()) { in EmitMove()
6015 XmmRegister dest = destination.AsFpuRegister<XmmRegister>(); in EmitMove()
6018 DCHECK(destination.IsStackSlot()) << destination; in EmitMove()
6020 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), imm); in EmitMove()
6026 if (destination.IsFpuRegister()) { in EmitMove()
6027 XmmRegister dest = destination.AsFpuRegister<XmmRegister>(); in EmitMove()
6030 DCHECK(destination.IsDoubleStackSlot()) << destination; in EmitMove()
6031 codegen_->Store64BitValueToStack(destination, value); in EmitMove()
6035 if (destination.IsFpuRegister()) { in EmitMove()
6036 __ movaps(destination.AsFpuRegister<XmmRegister>(), source.AsFpuRegister<XmmRegister>()); in EmitMove()
6037 } else if (destination.IsStackSlot()) { in EmitMove()
6038 __ movss(Address(CpuRegister(RSP), destination.GetStackIndex()), in EmitMove()
6040 } else if (destination.IsDoubleStackSlot()) { in EmitMove()
6041 __ movsd(Address(CpuRegister(RSP), destination.GetStackIndex()), in EmitMove()
6044 DCHECK(destination.IsSIMDStackSlot()); in EmitMove()
6045 __ movups(Address(CpuRegister(RSP), destination.GetStackIndex()), in EmitMove()
6126 Location destination = move->GetDestination(); in EmitSwap() local
6128 if (source.IsRegister() && destination.IsRegister()) { in EmitSwap()
6129 Exchange64(source.AsRegister<CpuRegister>(), destination.AsRegister<CpuRegister>()); in EmitSwap()
6130 } else if (source.IsRegister() && destination.IsStackSlot()) { in EmitSwap()
6131 Exchange32(source.AsRegister<CpuRegister>(), destination.GetStackIndex()); in EmitSwap()
6132 } else if (source.IsStackSlot() && destination.IsRegister()) { in EmitSwap()
6133 Exchange32(destination.AsRegister<CpuRegister>(), source.GetStackIndex()); in EmitSwap()
6134 } else if (source.IsStackSlot() && destination.IsStackSlot()) { in EmitSwap()
6135 ExchangeMemory32(destination.GetStackIndex(), source.GetStackIndex()); in EmitSwap()
6136 } else if (source.IsRegister() && destination.IsDoubleStackSlot()) { in EmitSwap()
6137 Exchange64(source.AsRegister<CpuRegister>(), destination.GetStackIndex()); in EmitSwap()
6138 } else if (source.IsDoubleStackSlot() && destination.IsRegister()) { in EmitSwap()
6139 Exchange64(destination.AsRegister<CpuRegister>(), source.GetStackIndex()); in EmitSwap()
6140 } else if (source.IsDoubleStackSlot() && destination.IsDoubleStackSlot()) { in EmitSwap()
6141 ExchangeMemory64(destination.GetStackIndex(), source.GetStackIndex(), 1); in EmitSwap()
6142 } else if (source.IsFpuRegister() && destination.IsFpuRegister()) { in EmitSwap()
6144 __ movaps(source.AsFpuRegister<XmmRegister>(), destination.AsFpuRegister<XmmRegister>()); in EmitSwap()
6145 __ movd(destination.AsFpuRegister<XmmRegister>(), CpuRegister(TMP)); in EmitSwap()
6146 } else if (source.IsFpuRegister() && destination.IsStackSlot()) { in EmitSwap()
6147 Exchange32(source.AsFpuRegister<XmmRegister>(), destination.GetStackIndex()); in EmitSwap()
6148 } else if (source.IsStackSlot() && destination.IsFpuRegister()) { in EmitSwap()
6149 Exchange32(destination.AsFpuRegister<XmmRegister>(), source.GetStackIndex()); in EmitSwap()
6150 } else if (source.IsFpuRegister() && destination.IsDoubleStackSlot()) { in EmitSwap()
6151 Exchange64(source.AsFpuRegister<XmmRegister>(), destination.GetStackIndex()); in EmitSwap()
6152 } else if (source.IsDoubleStackSlot() && destination.IsFpuRegister()) { in EmitSwap()
6153 Exchange64(destination.AsFpuRegister<XmmRegister>(), source.GetStackIndex()); in EmitSwap()
6154 } else if (source.IsSIMDStackSlot() && destination.IsSIMDStackSlot()) { in EmitSwap()
6155 ExchangeMemory64(destination.GetStackIndex(), source.GetStackIndex(), 2); in EmitSwap()
6156 } else if (source.IsFpuRegister() && destination.IsSIMDStackSlot()) { in EmitSwap()
6157 Exchange128(source.AsFpuRegister<XmmRegister>(), destination.GetStackIndex()); in EmitSwap()
6158 } else if (destination.IsFpuRegister() && source.IsSIMDStackSlot()) { in EmitSwap()
6159 Exchange128(destination.AsFpuRegister<XmmRegister>(), source.GetStackIndex()); in EmitSwap()
6161 LOG(FATAL) << "Unimplemented swap between " << source << " and " << destination; in EmitSwap()