Lines Matching refs:reg
199 .macro FETCH_ADVANCE_INST_RB reg argument
200 ldrh rINST, [rPC, \reg]!
209 .macro FETCH reg, count
210 ldrh \reg, [rPC, #((\count)*2)]
213 .macro FETCH_S reg, count
214 ldrsh \reg, [rPC, #((\count)*2)]
222 .macro FETCH_B reg, count, byte
223 ldrb \reg, [rPC, #((\count)*2+(\byte))]
229 .macro GET_INST_OPCODE reg argument
230 and \reg, rINST, #255
244 .macro GOTO_OPCODE reg argument
245 add pc, rIBASE, \reg, lsl #${handler_size_bits}
247 .macro GOTO_OPCODE_BASE base,reg argument
248 add pc, \base, \reg, lsl #${handler_size_bits}
254 .macro GET_VREG reg, vreg
255 ldr \reg, [rFP, \vreg, lsl #2]
257 .macro SET_VREG reg, vreg
258 str \reg, [rFP, \vreg, lsl #2]
259 mov \reg, #0
260 str \reg, [rREFS, \vreg, lsl #2]
270 .macro SET_VREG_OBJECT reg, vreg, tmpreg
271 str \reg, [rFP, \vreg, lsl #2]
272 str \reg, [rREFS, \vreg, lsl #2]
274 .macro SET_VREG_SHADOW reg, vreg
275 str \reg, [rREFS, \vreg, lsl #2]
277 .macro SET_VREG_FLOAT reg, vreg, tmpreg
279 fsts \reg, [\tmpreg]
297 .macro VREG_INDEX_TO_ADDR reg, vreg
298 add \reg, rFP, \vreg, lsl #2 /* WARNING/FIXME: handle shadow frame vreg zero if store */
307 .macro GET_VREG_FLOAT_BY_ADDR reg, addr
308 flds \reg, [\addr]
310 .macro SET_VREG_FLOAT_BY_ADDR reg, addr
311 fsts \reg, [\addr]
313 .macro GET_VREG_DOUBLE_BY_ADDR reg, addr
314 fldd \reg, [\addr]
316 .macro SET_VREG_DOUBLE_BY_ADDR reg, addr
317 fstd \reg, [\addr]