Lines Matching refs:lsl
177 add \reg, xIBASE, \reg, lsl #${handler_size_bits}
387 lsl x14, x14, #2
396 add \refs, x14, ip2, lsl #2
399 add \fp, \refs, ip, lsl #2
635 add ip2, xREFS, x3, lsl #2 // pointer to first argument in reference array
636 add ip2, ip2, x2, lsl #2 // pointer to last argument in reference array
637 add x5, xFP, x3, lsl #2 // pointer to first argument in register array
638 add x6, x5, x2, lsl #2 // pointer to last argument in register array
764 add ip, ip, ip2, lsl #32
823 add \gpr_reg64, ip, ip2, lsl #32
1244 ldr wip, [x8, ip2, lsl #2]
1245 str wip, [x9, ip2, lsl #2]
1418 add ip, ip, ip2, lsl #4 // entry address within the cache
1600 lsl x21, ip2, #2 // x21 is now the offset for inputs into the registers array.
1776 add x1, xPC, xINST, lsl #1