Lines Matching refs:__m256
27 const __m256 vlog2e = _mm256_set1_ps(0x1.715476p+0f); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
28 const __m256 vminus_ln2_hi = _mm256_set1_ps(-0x1.62E43p-1f); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
29 const __m256 vminus_ln2_lo = _mm256_set1_ps(0x1.05C61p-29f); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
33 const __m256 vmin_exponent = _mm256_set1_ps(-127.0f); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
34 const __m256 vmagic_bias = _mm256_set1_ps(0x1.8000FEp23f); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
35 const __m256 vminus_inf = _mm256_set1_ps(-INFINITY); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
37 const __m256 vc0 = _mm256_set1_ps(1.0f); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
38 const __m256 vc1 = _mm256_set1_ps(0x1.FFFFF6p-1f); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
39 const __m256 vc2 = _mm256_set1_ps(0x1.FFFDC6p-2f); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
40 const __m256 vc3 = _mm256_set1_ps(0x1.555A80p-3f); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
41 const __m256 vc4 = _mm256_set1_ps(0x1.573A1Ap-5f); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
42 const __m256 vc5 = _mm256_set1_ps(0x1.0F9F9Cp-7f); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
44 __m256 vaccv0 = _mm256_setzero_ps(); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
45 __m256 vaccv1 = _mm256_setzero_ps(); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
46 __m256 vaccv2 = _mm256_setzero_ps(); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
47 __m256 vaccv3 = _mm256_setzero_ps(); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
48 __m256 vaccv4 = _mm256_setzero_ps(); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
49 __m256 vacce0 = vminus_inf; in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
50 __m256 vacce1 = vminus_inf; in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
51 __m256 vacce2 = vminus_inf; in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
52 __m256 vacce3 = vminus_inf; in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
53 __m256 vacce4 = vminus_inf; in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
56 const __m256 vx0 = _mm256_loadu_ps(x); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
57 const __m256 vx1 = _mm256_loadu_ps(x + 8); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
58 const __m256 vx2 = _mm256_loadu_ps(x + 16); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
59 const __m256 vx3 = _mm256_loadu_ps(x + 24); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
60 const __m256 vx4 = _mm256_loadu_ps(x + 32); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
61 const __m256 vx5 = _mm256_loadu_ps(x + 40); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
62 const __m256 vx6 = _mm256_loadu_ps(x + 48); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
63 const __m256 vx7 = _mm256_loadu_ps(x + 56); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
64 const __m256 vx8 = _mm256_loadu_ps(x + 64); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
65 const __m256 vx9 = _mm256_loadu_ps(x + 72); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
69 …const __m256 vn0 = _mm256_round_ps(_mm256_mul_ps(vx0, vlog2e), _MM_FROUND_TO_NEAREST_INT | _MM_FRO… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
70 …const __m256 vn1 = _mm256_round_ps(_mm256_mul_ps(vx1, vlog2e), _MM_FROUND_TO_NEAREST_INT | _MM_FRO… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
71 …const __m256 vn2 = _mm256_round_ps(_mm256_mul_ps(vx2, vlog2e), _MM_FROUND_TO_NEAREST_INT | _MM_FRO… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
72 …const __m256 vn3 = _mm256_round_ps(_mm256_mul_ps(vx3, vlog2e), _MM_FROUND_TO_NEAREST_INT | _MM_FRO… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
73 …const __m256 vn4 = _mm256_round_ps(_mm256_mul_ps(vx4, vlog2e), _MM_FROUND_TO_NEAREST_INT | _MM_FRO… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
74 …const __m256 vn5 = _mm256_round_ps(_mm256_mul_ps(vx5, vlog2e), _MM_FROUND_TO_NEAREST_INT | _MM_FRO… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
75 …const __m256 vn6 = _mm256_round_ps(_mm256_mul_ps(vx6, vlog2e), _MM_FROUND_TO_NEAREST_INT | _MM_FRO… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
76 …const __m256 vn7 = _mm256_round_ps(_mm256_mul_ps(vx7, vlog2e), _MM_FROUND_TO_NEAREST_INT | _MM_FRO… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
77 …const __m256 vn8 = _mm256_round_ps(_mm256_mul_ps(vx8, vlog2e), _MM_FROUND_TO_NEAREST_INT | _MM_FRO… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
78 …const __m256 vn9 = _mm256_round_ps(_mm256_mul_ps(vx9, vlog2e), _MM_FROUND_TO_NEAREST_INT | _MM_FRO… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
82 __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2_hi, vx0); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
83 __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2_hi, vx1); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
84 __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2_hi, vx2); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
85 __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2_hi, vx3); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
86 __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2_hi, vx4); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
87 __m256 vt5 = _mm256_fmadd_ps(vn5, vminus_ln2_hi, vx5); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
88 __m256 vt6 = _mm256_fmadd_ps(vn6, vminus_ln2_hi, vx6); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
89 __m256 vt7 = _mm256_fmadd_ps(vn7, vminus_ln2_hi, vx7); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
90 __m256 vt8 = _mm256_fmadd_ps(vn8, vminus_ln2_hi, vx8); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
91 __m256 vt9 = _mm256_fmadd_ps(vn9, vminus_ln2_hi, vx9); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
105 __m256 vp0 = _mm256_fmadd_ps(vc5, vt0, vc4); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
106 __m256 vp1 = _mm256_fmadd_ps(vc5, vt1, vc4); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
107 __m256 vp2 = _mm256_fmadd_ps(vc5, vt2, vc4); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
108 __m256 vp3 = _mm256_fmadd_ps(vc5, vt3, vc4); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
109 __m256 vp4 = _mm256_fmadd_ps(vc5, vt4, vc4); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
110 __m256 vp5 = _mm256_fmadd_ps(vc5, vt5, vc4); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
111 __m256 vp6 = _mm256_fmadd_ps(vc5, vt6, vc4); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
112 __m256 vp7 = _mm256_fmadd_ps(vc5, vt7, vc4); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
113 __m256 vp8 = _mm256_fmadd_ps(vc5, vt8, vc4); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
114 __m256 vp9 = _mm256_fmadd_ps(vc5, vt9, vc4); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
170 __m256 vmax_e0 = _mm256_max_ps(vacce0, vn0); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
171 __m256 vmax_e1 = _mm256_max_ps(vacce1, vn1); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
172 __m256 vmax_e2 = _mm256_max_ps(vacce2, vn2); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
173 __m256 vmax_e3 = _mm256_max_ps(vacce3, vn3); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
174 __m256 vmax_e4 = _mm256_max_ps(vacce4, vn4); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
185 const __m256 vdelta_acce0 = _mm256_max_ps(_mm256_sub_ps(vacce0, vmax_e0), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
186 const __m256 vdelta_acce1 = _mm256_max_ps(_mm256_sub_ps(vacce1, vmax_e1), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
187 const __m256 vdelta_acce2 = _mm256_max_ps(_mm256_sub_ps(vacce2, vmax_e2), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
188 const __m256 vdelta_acce3 = _mm256_max_ps(_mm256_sub_ps(vacce3, vmax_e3), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
189 const __m256 vdelta_acce4 = _mm256_max_ps(_mm256_sub_ps(vacce4, vmax_e4), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
190 const __m256 vdelta_e0 = _mm256_max_ps(_mm256_sub_ps(vn0, vmax_e0), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
191 const __m256 vdelta_e1 = _mm256_max_ps(_mm256_sub_ps(vn1, vmax_e1), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
192 const __m256 vdelta_e2 = _mm256_max_ps(_mm256_sub_ps(vn2, vmax_e2), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
193 const __m256 vdelta_e3 = _mm256_max_ps(_mm256_sub_ps(vn3, vmax_e3), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
194 const __m256 vdelta_e4 = _mm256_max_ps(_mm256_sub_ps(vn4, vmax_e4), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
195 const __m256 vdelta_e5 = _mm256_max_ps(_mm256_sub_ps(vn5, vmax_e0), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
196 const __m256 vdelta_e6 = _mm256_max_ps(_mm256_sub_ps(vn6, vmax_e1), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
197 const __m256 vdelta_e7 = _mm256_max_ps(_mm256_sub_ps(vn7, vmax_e2), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
198 const __m256 vdelta_e8 = _mm256_max_ps(_mm256_sub_ps(vn8, vmax_e3), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
199 const __m256 vdelta_e9 = _mm256_max_ps(_mm256_sub_ps(vn9, vmax_e4), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
206 …const __m256 vaccs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdel… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
207 …const __m256 vaccs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdel… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
208 …const __m256 vaccs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdel… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
209 …const __m256 vaccs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdel… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
210 …const __m256 vaccs4 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdel… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
211 …const __m256 vs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdelta_… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
212 …const __m256 vs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdelta_… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
213 …const __m256 vs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdelta_… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
214 …const __m256 vs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdelta_… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
215 …const __m256 vs4 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdelta_… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
216 …const __m256 vs5 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdelta_… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
217 …const __m256 vs6 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdelta_… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
218 …const __m256 vs7 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdelta_… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
219 …const __m256 vs8 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdelta_… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
220 …const __m256 vs9 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdelta_… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
247 const __m256 vmax_acce01 = _mm256_max_ps(vacce0, vacce1); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
248 const __m256 vmax_acce23 = _mm256_max_ps(vacce2, vacce3); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
249 const __m256 vmax_acce4 = vacce4; in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
250 const __m256 vmax_acce0123 = _mm256_max_ps(vmax_acce01, vmax_acce23); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
251 const __m256 vmax_acce01234 = _mm256_max_ps(vmax_acce0123, vmax_acce4); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
253 const __m256 vdelta_acce0 = _mm256_max_ps(_mm256_sub_ps(vacce0, vmax_acce01234), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
254 const __m256 vdelta_acce1 = _mm256_max_ps(_mm256_sub_ps(vacce1, vmax_acce01234), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
255 const __m256 vdelta_acce2 = _mm256_max_ps(_mm256_sub_ps(vacce2, vmax_acce01234), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
256 const __m256 vdelta_acce3 = _mm256_max_ps(_mm256_sub_ps(vacce3, vmax_acce01234), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
257 const __m256 vdelta_acce4 = _mm256_max_ps(_mm256_sub_ps(vacce4, vmax_acce01234), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
259 …const __m256 vaccs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdel… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
260 …const __m256 vaccs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdel… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
261 …const __m256 vaccs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdel… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
262 …const __m256 vaccs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdel… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
263 …const __m256 vaccs4 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdel… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
265 __m256 vaccv = _mm256_mul_ps(vaccv0, vaccs0); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
270 __m256 vacce = vmax_acce01234; in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
274 const __m256 vx = _mm256_loadu_ps(x); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
278 …const __m256 vn = _mm256_round_ps(_mm256_mul_ps(vx, vlog2e), _MM_FROUND_TO_NEAREST_INT | _MM_FROUN… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
282 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2_hi, vx); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
286 __m256 vp = _mm256_fmadd_ps(vc5, vt, vc4); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
293 const __m256 vmax_e = _mm256_max_ps(vacce, vn); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
296 const __m256 vdelta_acce = _mm256_max_ps(_mm256_sub_ps(vacce, vmax_e), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
297 const __m256 vdelta_e = _mm256_max_ps(_mm256_sub_ps(vn, vmax_e), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
300 …const __m256 vaccs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdelt… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
301 …const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdelta_e… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
315 const __m256 vx = _mm256_maskload_ps(x, vmask); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
318 …__m256 vn = _mm256_round_ps(_mm256_mul_ps(vx, vlog2e), _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_E… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
322 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2_hi, vx); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
329 __m256 vp = _mm256_fmadd_ps(vc5, vt, vc4); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
337 const __m256 vmax_e = _mm256_max_ps(vacce, vn); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
340 const __m256 vdelta_e = _mm256_max_ps(_mm256_sub_ps(vn, vmax_e), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
341 const __m256 vdelta_acce = _mm256_max_ps(_mm256_sub_ps(vacce, vmax_e), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
344 …const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdelta_e… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
345 …const __m256 vaccs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdelt… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
355 __m256 vmax_acce = _mm256_max_ps(vacce, _mm256_permute2f128_ps(vacce, vacce, 1)); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
358 const __m256 vdelta_acce = _mm256_max_ps(_mm256_sub_ps(vacce, vmax_acce), vmin_exponent); in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()
359 …const __m256 vaccs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(_mm256_add_ps(vdelt… in xnn_f32_raddextexp_ukernel__avx2_p5_x80_acc5()