Lines Matching refs:__m256
28 const __m256 vsign_mask = _mm256_set1_ps(-0.0f); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
29 const __m256 vmagic_bias = _mm256_set1_ps(0x1.8000FEp23f); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
30 const __m256 vlog2e = _mm256_set1_ps(0x1.715476p0f); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
31 const __m256 vminus_ln2 = _mm256_set1_ps(-0x1.62E43p-1f); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
32 const __m256 vc5 = _mm256_set1_ps(0x1.0F9F9Cp-7f); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
33 const __m256 vc4 = _mm256_set1_ps(0x1.573A1Ap-5f); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
34 const __m256 vc3 = _mm256_set1_ps(0x1.555A80p-3f); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
35 const __m256 vc2 = _mm256_set1_ps(0x1.FFFDC6p-2f); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
36 const __m256 vc1 = _mm256_set1_ps(0x1.FFFFF6p-1f); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
37 const __m256 vone = _mm256_set1_ps(1.0f); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
38 const __m256 vdenorm_cutoff = _mm256_set1_ps(-0x1.5D589Ep+6f); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
41 const __m256 vx0 = _mm256_loadu_ps(x); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
42 const __m256 vx1 = _mm256_loadu_ps(x + 8); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
43 const __m256 vx2 = _mm256_loadu_ps(x + 16); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
44 const __m256 vx3 = _mm256_loadu_ps(x + 24); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
45 const __m256 vx4 = _mm256_loadu_ps(x + 32); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
46 const __m256 vx5 = _mm256_loadu_ps(x + 40); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
47 const __m256 vx6 = _mm256_loadu_ps(x + 48); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
48 const __m256 vx7 = _mm256_loadu_ps(x + 56); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
49 const __m256 vx8 = _mm256_loadu_ps(x + 64); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
52 const __m256 vz0 = _mm256_or_ps(vx0, vsign_mask); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
53 const __m256 vz1 = _mm256_or_ps(vx1, vsign_mask); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
54 const __m256 vz2 = _mm256_or_ps(vx2, vsign_mask); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
55 const __m256 vz3 = _mm256_or_ps(vx3, vsign_mask); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
56 const __m256 vz4 = _mm256_or_ps(vx4, vsign_mask); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
57 const __m256 vz5 = _mm256_or_ps(vx5, vsign_mask); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
58 const __m256 vz6 = _mm256_or_ps(vx6, vsign_mask); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
59 const __m256 vz7 = _mm256_or_ps(vx7, vsign_mask); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
60 const __m256 vz8 = _mm256_or_ps(vx8, vsign_mask); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
62 __m256 vn0 = _mm256_fmadd_ps(vz0, vlog2e, vmagic_bias); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
63 __m256 vn1 = _mm256_fmadd_ps(vz1, vlog2e, vmagic_bias); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
64 __m256 vn2 = _mm256_fmadd_ps(vz2, vlog2e, vmagic_bias); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
65 __m256 vn3 = _mm256_fmadd_ps(vz3, vlog2e, vmagic_bias); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
66 __m256 vn4 = _mm256_fmadd_ps(vz4, vlog2e, vmagic_bias); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
67 __m256 vn5 = _mm256_fmadd_ps(vz5, vlog2e, vmagic_bias); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
68 __m256 vn6 = _mm256_fmadd_ps(vz6, vlog2e, vmagic_bias); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
69 __m256 vn7 = _mm256_fmadd_ps(vz7, vlog2e, vmagic_bias); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
70 __m256 vn8 = _mm256_fmadd_ps(vz8, vlog2e, vmagic_bias); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
72 const __m256 vs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn0), 23)); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
73 const __m256 vs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn1), 23)); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
74 const __m256 vs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn2), 23)); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
75 const __m256 vs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn3), 23)); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
76 const __m256 vs4 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn4), 23)); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
77 const __m256 vs5 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn5), 23)); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
78 const __m256 vs6 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn6), 23)); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
79 const __m256 vs7 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn7), 23)); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
80 const __m256 vs8 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn8), 23)); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
92 __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2, vz0); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
93 __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2, vz1); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
94 __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2, vz2); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
95 __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2, vz3); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
96 __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2, vz4); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
97 __m256 vt5 = _mm256_fmadd_ps(vn5, vminus_ln2, vz5); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
98 __m256 vt6 = _mm256_fmadd_ps(vn6, vminus_ln2, vz6); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
99 __m256 vt7 = _mm256_fmadd_ps(vn7, vminus_ln2, vz7); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
100 __m256 vt8 = _mm256_fmadd_ps(vn8, vminus_ln2, vz8); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
102 __m256 vp0 = _mm256_fmadd_ps(vc5, vt0, vc4); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
103 __m256 vp1 = _mm256_fmadd_ps(vc5, vt1, vc4); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
104 __m256 vp2 = _mm256_fmadd_ps(vc5, vt2, vc4); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
105 __m256 vp3 = _mm256_fmadd_ps(vc5, vt3, vc4); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
106 __m256 vp4 = _mm256_fmadd_ps(vc5, vt4, vc4); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
107 __m256 vp5 = _mm256_fmadd_ps(vc5, vt5, vc4); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
108 __m256 vp6 = _mm256_fmadd_ps(vc5, vt6, vc4); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
109 __m256 vp7 = _mm256_fmadd_ps(vc5, vt7, vc4); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
110 __m256 vp8 = _mm256_fmadd_ps(vc5, vt8, vc4); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
152 const __m256 ve0 = _mm256_fmadd_ps(vt0, vp0, vs0); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
153 const __m256 ve1 = _mm256_fmadd_ps(vt1, vp1, vs1); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
154 const __m256 ve2 = _mm256_fmadd_ps(vt2, vp2, vs2); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
155 const __m256 ve3 = _mm256_fmadd_ps(vt3, vp3, vs3); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
156 const __m256 ve4 = _mm256_fmadd_ps(vt4, vp4, vs4); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
157 const __m256 ve5 = _mm256_fmadd_ps(vt5, vp5, vs5); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
158 const __m256 ve6 = _mm256_fmadd_ps(vt6, vp6, vs6); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
159 const __m256 ve7 = _mm256_fmadd_ps(vt7, vp7, vs7); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
160 const __m256 ve8 = _mm256_fmadd_ps(vt8, vp8, vs8); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
162 const __m256 vd0 = _mm256_add_ps(ve0, vone); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
163 const __m256 vd1 = _mm256_add_ps(ve1, vone); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
164 const __m256 vd2 = _mm256_add_ps(ve2, vone); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
165 const __m256 vd3 = _mm256_add_ps(ve3, vone); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
166 const __m256 vd4 = _mm256_add_ps(ve4, vone); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
167 const __m256 vd5 = _mm256_add_ps(ve5, vone); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
168 const __m256 vd6 = _mm256_add_ps(ve6, vone); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
169 const __m256 vd7 = _mm256_add_ps(ve7, vone); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
170 const __m256 vd8 = _mm256_add_ps(ve8, vone); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
172 __m256 vf0 = _mm256_div_ps(ve0, vd0); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
173 __m256 vf1 = _mm256_div_ps(ve1, vd1); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
174 __m256 vf2 = _mm256_div_ps(ve2, vd2); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
175 __m256 vf3 = _mm256_div_ps(ve3, vd3); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
176 __m256 vf4 = _mm256_div_ps(ve4, vd4); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
177 __m256 vf5 = _mm256_div_ps(ve5, vd5); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
178 __m256 vf6 = _mm256_div_ps(ve6, vd6); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
179 __m256 vf7 = _mm256_div_ps(ve7, vd7); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
180 __m256 vf8 = _mm256_div_ps(ve8, vd8); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
214 const __m256 vx = _mm256_loadu_ps(x); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
217 const __m256 vz = _mm256_or_ps(vx, vsign_mask); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
219 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
220 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23)); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
223 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
225 __m256 vp = _mm256_fmadd_ps(vc5, vt, vc4); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
231 const __m256 ve = _mm256_fmadd_ps(vt, vp, vs); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
233 const __m256 vd = _mm256_add_ps(ve, vone); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
234 __m256 vf = _mm256_div_ps(ve, vd); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
247 const __m256 vx = _mm256_maskload_ps(x, vmask); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
249 const __m256 vz = _mm256_or_ps(vx, vsign_mask); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
251 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
252 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23)); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
255 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
257 __m256 vp = _mm256_fmadd_ps(vc5, vt, vc4); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
263 const __m256 ve = _mm256_fmadd_ps(vt, vp, vs); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
265 const __m256 vd = _mm256_add_ps(ve, vone); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()
266 __m256 vf = _mm256_div_ps(ve, vd); in xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x72()