Lines Matching refs:wasm_i16x8_mul
99 const v128_t vprod0x01234567 = wasm_i16x8_mul(vi0x01234567, vk0x01234567); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
100 const v128_t vprod0x89ABCDEF = wasm_i16x8_mul(vi0x89ABCDEF, vk0x89ABCDEF); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
101 const v128_t vprod0xGHIJKLMN = wasm_i16x8_mul(vi0xGHIJKLMN, vk0xGHIJKLMN); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
118 const v128_t vprod1x01234567 = wasm_i16x8_mul(vi1x01234567, vk1x01234567); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
119 const v128_t vprod1x89ABCDEF = wasm_i16x8_mul(vi1x89ABCDEF, vk1x89ABCDEF); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
120 const v128_t vprod1xGHIJKLMN = wasm_i16x8_mul(vi1xGHIJKLMN, vk1xGHIJKLMN); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
137 const v128_t vprod2x01234567 = wasm_i16x8_mul(vi2x01234567, vk2x01234567); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
138 const v128_t vprod2x89ABCDEF = wasm_i16x8_mul(vi2x89ABCDEF, vk2x89ABCDEF); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
139 const v128_t vprod2xGHIJKLMN = wasm_i16x8_mul(vi2xGHIJKLMN, vk2xGHIJKLMN); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
156 const v128_t vprod3x01234567 = wasm_i16x8_mul(vi3x01234567, vk3x01234567); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
157 const v128_t vprod3x89ABCDEF = wasm_i16x8_mul(vi3x89ABCDEF, vk3x89ABCDEF); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
158 const v128_t vprod3xGHIJKLMN = wasm_i16x8_mul(vi3xGHIJKLMN, vk3xGHIJKLMN); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
175 const v128_t vprod4x01234567 = wasm_i16x8_mul(vi4x01234567, vk4x01234567); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
176 const v128_t vprod4x89ABCDEF = wasm_i16x8_mul(vi4x89ABCDEF, vk4x89ABCDEF); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
177 const v128_t vprod4xGHIJKLMN = wasm_i16x8_mul(vi4xGHIJKLMN, vk4xGHIJKLMN); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
194 const v128_t vprod5x01234567 = wasm_i16x8_mul(vi5x01234567, vk5x01234567); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
195 const v128_t vprod5x89ABCDEF = wasm_i16x8_mul(vi5x89ABCDEF, vk5x89ABCDEF); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
196 const v128_t vprod5xGHIJKLMN = wasm_i16x8_mul(vi5xGHIJKLMN, vk5xGHIJKLMN); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
213 const v128_t vprod6x01234567 = wasm_i16x8_mul(vi6x01234567, vk6x01234567); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
214 const v128_t vprod6x89ABCDEF = wasm_i16x8_mul(vi6x89ABCDEF, vk6x89ABCDEF); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
215 const v128_t vprod6xGHIJKLMN = wasm_i16x8_mul(vi6xGHIJKLMN, vk6xGHIJKLMN); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
232 const v128_t vprod7x01234567 = wasm_i16x8_mul(vi7x01234567, vk7x01234567); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
233 const v128_t vprod7x89ABCDEF = wasm_i16x8_mul(vi7x89ABCDEF, vk7x89ABCDEF); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
234 const v128_t vprod7xGHIJKLMN = wasm_i16x8_mul(vi7xGHIJKLMN, vk7xGHIJKLMN); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
251 const v128_t vprod8x01234567 = wasm_i16x8_mul(vi8x01234567, vk8x01234567); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
252 const v128_t vprod8x89ABCDEF = wasm_i16x8_mul(vi8x89ABCDEF, vk8x89ABCDEF); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
253 const v128_t vprod8xGHIJKLMN = wasm_i16x8_mul(vi8xGHIJKLMN, vk8xGHIJKLMN); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
348 const v128_t vprod0x01234567 = wasm_i16x8_mul(vi0x01234567, vk0x01234567); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
357 const v128_t vprod1x01234567 = wasm_i16x8_mul(vi1x01234567, vk1x01234567); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
366 const v128_t vprod2x01234567 = wasm_i16x8_mul(vi2x01234567, vk2x01234567); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
375 const v128_t vprod3x01234567 = wasm_i16x8_mul(vi3x01234567, vk3x01234567); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
384 const v128_t vprod4x01234567 = wasm_i16x8_mul(vi4x01234567, vk4x01234567); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
393 const v128_t vprod5x01234567 = wasm_i16x8_mul(vi5x01234567, vk5x01234567); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
402 const v128_t vprod6x01234567 = wasm_i16x8_mul(vi6x01234567, vk6x01234567); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
411 const v128_t vprod7x01234567 = wasm_i16x8_mul(vi7x01234567, vk7x01234567); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()
420 const v128_t vprod8x01234567 = wasm_i16x8_mul(vi8x01234567, vk8x01234567); in xnn_qs8_dwconv_minmax_ukernel_up24x9__wasmsimd_mul16()