Lines Matching refs:n_div_4_subtile
32122 TEST(QS8_IGEMM_MINMAX_1X4C2__SSE2_LD64, n_div_4_subtile) { in TEST() argument
32590 TEST(QS8_IGEMM_MINMAX_4X4C2__SSE2_LD64, n_div_4_subtile) { in TEST() argument
33058 TEST(QS8_IGEMM_MINMAX_1X4C2__SSSE3_LD64, n_div_4_subtile) { in TEST() argument
33526 TEST(QS8_IGEMM_MINMAX_4X4C2__SSSE3_LD64, n_div_4_subtile) { in TEST() argument
33994 TEST(QS8_IGEMM_MINMAX_1X4C2__SSE41_LD64, n_div_4_subtile) { in TEST() argument
34462 TEST(QS8_IGEMM_MINMAX_4X4C2__SSE41_LD64, n_div_4_subtile) { in TEST() argument
34930 TEST(QS8_IGEMM_MINMAX_1X4C2__XOP_LD64, n_div_4_subtile) { in TEST() argument
35398 TEST(QS8_IGEMM_MINMAX_4X4C2__XOP_LD64, n_div_4_subtile) { in TEST() argument
35866 TEST(QS8_IGEMM_MINMAX_1X4C2__SSE2_LD128, n_div_4_subtile) { in TEST() argument
36334 TEST(QS8_IGEMM_MINMAX_4X4C2__SSE2_LD128, n_div_4_subtile) { in TEST() argument
36802 TEST(QS8_IGEMM_MINMAX_1X4C2__SSSE3_LD128, n_div_4_subtile) { in TEST() argument
37270 TEST(QS8_IGEMM_MINMAX_4X4C2__SSSE3_LD128, n_div_4_subtile) { in TEST() argument
37738 TEST(QS8_IGEMM_MINMAX_1X4C2__SSE41_LD128, n_div_4_subtile) { in TEST() argument
38206 TEST(QS8_IGEMM_MINMAX_4X4C2__SSE41_LD128, n_div_4_subtile) { in TEST() argument
38674 TEST(QS8_IGEMM_MINMAX_1X4C2__XOP_LD128, n_div_4_subtile) { in TEST() argument
39142 TEST(QS8_IGEMM_MINMAX_4X4C2__XOP_LD128, n_div_4_subtile) { in TEST() argument
39610 TEST(QS8_IGEMM_MINMAX_1X4C8__SSE2_LD64, n_div_4_subtile) { in TEST() argument
40078 TEST(QS8_IGEMM_MINMAX_2X4C8__SSE2_LD64, n_div_4_subtile) { in TEST() argument
40546 TEST(QS8_IGEMM_MINMAX_3X4C8__SSE2_LD64, n_div_4_subtile) { in TEST() argument
41014 TEST(QS8_IGEMM_MINMAX_1X4C8__SSSE3_LD64, n_div_4_subtile) { in TEST() argument
41482 TEST(QS8_IGEMM_MINMAX_2X4C8__SSSE3_LD64, n_div_4_subtile) { in TEST() argument
41950 TEST(QS8_IGEMM_MINMAX_3X4C8__SSSE3_LD64, n_div_4_subtile) { in TEST() argument
42418 TEST(QS8_IGEMM_MINMAX_1X4C8__SSE41_LD64, n_div_4_subtile) { in TEST() argument
42886 TEST(QS8_IGEMM_MINMAX_2X4C8__SSE41_LD64, n_div_4_subtile) { in TEST() argument
43354 TEST(QS8_IGEMM_MINMAX_3X4C8__SSE41_LD64, n_div_4_subtile) { in TEST() argument
43822 TEST(QS8_IGEMM_MINMAX_1X4C8__XOP_LD64, n_div_4_subtile) { in TEST() argument
44290 TEST(QS8_IGEMM_MINMAX_2X4C8__XOP_LD64, n_div_4_subtile) { in TEST() argument
44758 TEST(QS8_IGEMM_MINMAX_3X4C8__XOP_LD64, n_div_4_subtile) { in TEST() argument
45226 TEST(QS8_IGEMM_MINMAX_1X4C8__SSE2_LD128, n_div_4_subtile) { in TEST() argument
45694 TEST(QS8_IGEMM_MINMAX_2X4C8__SSE2_LD128, n_div_4_subtile) { in TEST() argument
46162 TEST(QS8_IGEMM_MINMAX_3X4C8__SSE2_LD128, n_div_4_subtile) { in TEST() argument
46630 TEST(QS8_IGEMM_MINMAX_1X4C8__SSSE3_LD128, n_div_4_subtile) { in TEST() argument
47098 TEST(QS8_IGEMM_MINMAX_2X4C8__SSSE3_LD128, n_div_4_subtile) { in TEST() argument
47566 TEST(QS8_IGEMM_MINMAX_3X4C8__SSSE3_LD128, n_div_4_subtile) { in TEST() argument
48034 TEST(QS8_IGEMM_MINMAX_1X4C8__SSE41_LD128, n_div_4_subtile) { in TEST() argument
48502 TEST(QS8_IGEMM_MINMAX_2X4C8__SSE41_LD128, n_div_4_subtile) { in TEST() argument
48970 TEST(QS8_IGEMM_MINMAX_3X4C8__SSE41_LD128, n_div_4_subtile) { in TEST() argument
49438 TEST(QS8_IGEMM_MINMAX_1X4C8__XOP_LD128, n_div_4_subtile) { in TEST() argument
49906 TEST(QS8_IGEMM_MINMAX_2X4C8__XOP_LD128, n_div_4_subtile) { in TEST() argument
50374 TEST(QS8_IGEMM_MINMAX_3X4C8__XOP_LD128, n_div_4_subtile) { in TEST() argument
54102 TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, n_div_4_subtile) { in TEST() argument
54543 TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, n_div_4_subtile) { in TEST() argument
54984 TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, n_div_4_subtile) { in TEST() argument
55425 TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, n_div_4_subtile) { in TEST() argument
55866 TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, n_div_4_subtile) { in TEST() argument
56307 TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, n_div_4_subtile) { in TEST() argument