Lines Matching refs:EL3
48 - Boot Loader stage 3-1 (BL31) *EL3 Runtime Software*
56 - Boot Loader stage 3-2 (BL32) *EL3 Runtime Software*
75 - specification of the EL3 Runtime Software (BL31 for AArch64 and BL32 for
104 stage. BL2 passes the list of the next images to execute to the *EL3 Runtime
131 This stage begins execution from the platform's reset vector at EL3. The reset
212 SYS_LED[2:1] - Exception Level (EL3=0x3, EL2=0x2, EL1=0x1, EL0=0x0)
226 to EL3 Runtime Software.
248 both External Aborts and SError Interrupts in EL3. The ``SCR.SIF`` bit is
253 ``CPTR_EL2`` register from EL2 are configured to not trap to EL3 by
255 configured not to trap to EL3 by clearing the ``CPTR_EL3.TTA`` bit.
257 and Advanced SIMD execution are configured to not trap to EL3 by
265 do not trap to EL3. AArch64 Secure self-hosted debug is disabled by
390 EL3 Runtime Software and populate it.
421 EL3 Runtime Software image load
424 BL2 loads the EL3 Runtime Software image from platform storage into a platform-
446 BL2 relies on EL3 Runtime Software to pass control to BL33 once secure state
452 EL3 Runtime Software.
454 AArch64 BL31 (EL3 Runtime Software) execution
467 #. BL1 passes control to BL31 at the specified entrypoint at EL3.
469 Running BL2 at EL3 execution level
473 to execute at EL3. On these platforms, TF-A BL1 is a waste of memory
475 this waste, a special mode enables BL2 to execute at EL3, which allows
481 cold boot and warm boot. It runs at EL3 doing the arch
482 initialization required for EL3.
488 #. Since BL2 executes at EL3, BL2 jumps directly to the next image,
530 EL3. BL31 executes solely in trusted SRAM. BL31 is linked against and
588 detail in the "EL3 runtime services framework" section below.
609 EL3 Runtime Software initializes the EL2 or EL1 processor context for normal-
611 the non-secure execution state. EL3 Runtime Software uses the entrypoint
619 would like to use TF-A BL31 for the EL3 Runtime Software. To enable this
633 EL3, little-endian data access, and all interrupt sources masked:
723 AArch64 EL3, little-endian data access and all interrupt sources masked:
736 AArch32 EL3 Runtime Software entrypoint interface
741 AArch32 EL3 Runtime Software.
753 EL3, little-endian data access, and all interrupt sources masked:
761 platform code in AArch32 EL3 Runtime Software:
778 The AArch32 EL3 Runtime Software is responsible for entry into BL33. This
780 the AArch32 EL3 Runtime Software, or provided in a platform defined memory
784 accessed by AArch32 EL3 Runtime Software before the caches are enabled.
786 When using AArch32 EL3 Runtime Software, the Arm development platforms pass a
787 ``bl_params`` structure in ``R0`` from BL2 to be interpreted by AArch32 EL3 Runtime
793 AArch32 EL3 Runtime Software must not depend on the enabled state of the MMU,
800 The AArch32 EL3 Runtime Software cold boot interface uses ``bl_params`` instead
807 When requesting a CPU power-on, or suspending a running CPU, AArch32 EL3
810 then AArch32 EL3 Runtime Software must ensure that BL1 branches to the warm
814 In this case, the warm boot entrypoint must be in AArch32 EL3, little-endian
827 EL3 runtime services framework
831 levels lower than EL3 will request runtime services using the Secure Monitor
837 The EL3 runtime services framework enables the development of services by
840 registration, initialization and use of runtime services in EL3 Runtime
861 it also requires a *Secure Monitor* at EL3 to switch the EL1 processor
867 The interface between the EL3 Runtime Software and the Secure-EL1 Payload is
937 out any essential EL3 initialization before servicing requests. The ``init()``
965 When the EL3 runtime services framework receives a Secure Monitor Call, the SMC
1064 AArch64 or AArch32 EL3 Runtime Software for Armv8-A systems. A guide to
1065 integrating PSCI library with AArch32 EL3 Runtime Software can be found
1139 returning through EL3 and running the non-trusted firmware (BL33):
1175 reports the general purpose, EL3, Secure EL1 and some EL2 state registers.
1702 - EL3 Runtime Software, BL31 for AArch64 and BL32 for AArch32 (e.g. SP_MIN),
1705 remain valid only until execution reaches the EL3 Runtime Software entry
1708 - On Juno, SCP_BL2 is loaded temporarily into the EL3 Runtime Software memory
1709 region and transferred to the SCP before being overwritten by EL3 Runtime
2321 The Publish and Subscribe Framework allows EL3 components to define and publish
2322 events, to which other EL3 components can subscribe.
2608 causing a trap to EL3.
2682 other code. The PSCI implementation and other EL3 runtime frameworks reside
2686 - **Services.** EL3 runtime services (eg: SPD). Specific SPD services