Lines Matching refs:BIT
17 #define COMPHY_SELECTOR_PCIE_GBE0_SEL_BIT BIT(0)
19 #define COMPHY_SELECTOR_USB3_GBE1_SEL_BIT BIT(4)
21 #define COMPHY_SELECTOR_USB3_PHY_SEL_BIT BIT(8)
46 #define PU_IVREF_BIT BIT(15)
47 #define PU_PLL_BIT BIT(14)
48 #define PU_RX_BIT BIT(13)
49 #define PU_TX_BIT BIT(12)
50 #define PU_TX_INTP_BIT BIT(11)
51 #define PU_DFE_BIT BIT(10)
52 #define RESET_DTL_RX_BIT BIT(9)
53 #define PLL_LOCK_BIT BIT(8)
71 #define USE_MAX_PLL_RATE_BIT BIT(12)
77 #define PHYCTRL_FRM_PIN_BIT BIT(13)
86 #define PLL_READY_TX_BIT BIT(4)
91 #define TXD_INVERT_BIT BIT(10)
92 #define RXD_INVERT_BIT BIT(11)
102 #define PHY_ISOLATE_MODE BIT(15)
106 #define CLK100M_125M_EN BIT(4)
107 #define CLK500M_EN BIT(7)
108 #define PHY_REF_CLK_SEL BIT(10)
113 #define G2_TX_SSC_AMP_VALUE_20 BIT(14)
130 #define G3_VREG_RXTX_MAS_ISET_MASK (BIT(7) | BIT(8))
139 #define IDLE_SYNC_EN BIT(12)
144 #define SEL_BITS_PCIE_FORCE BIT(15)
153 #define PRD_TXDEEMPH0_MASK BIT(0)
154 #define PRD_TXMARGIN_MASK (BIT(1) | BIT(2) | BIT(3))
155 #define PRD_TXSWING_MASK BIT(4)
156 #define CFG_TX_ALIGN_POS_MASK (BIT(5) | BIT(6) | BIT(7) | BIT(8))
161 #define PRD_TXDEEMPH1_MASK BIT(15)
162 #define USE_MAX_PLL_RATE_EN BIT(9)
163 #define TX_DET_RX_MODE BIT(6)
164 #define GEN2_TX_DATA_DLY_MASK (BIT(3) | BIT(4))
166 #define TX_ELEC_IDLE_MODE_EN BIT(0)
171 #define TXDCLK_PCLK_EN BIT(0)
176 #define SPREAD_SPECTRUM_CLK_EN BIT(7)
181 #define SOFT_RESET BIT(0)
183 #define MODE_CORE_CLK_FREQ_SEL BIT(9)
184 #define MODE_PIPE_WIDTH_32 BIT(3)
193 #define MODE_MARGIN_OVERRIDE BIT(2)
198 #define MODE_CLK_SRC BIT(0)
199 #define BUNDLE_PERIOD_SEL BIT(1)
200 #define BUNDLE_PERIOD_SCALE (BIT(2) | BIT(3))
201 #define BUNDLE_SAMPLE_CTRL BIT(4)
202 #define PLL_READY_DLY (BIT(5) | BIT(6) | BIT(7))
203 #define CFG_SEL_20B BIT(15)
226 #define PIN_PU_IVEREF_BIT BIT(1)
227 #define PIN_RESET_CORE_BIT BIT(11)
228 #define PIN_RESET_COMPHY_BIT BIT(12)
229 #define PIN_PU_PLL_BIT BIT(16)
230 #define PIN_PU_RX_BIT BIT(17)
231 #define PIN_PU_TX_BIT BIT(18)
232 #define PIN_TX_IDLE_BIT BIT(19)
237 #define PHY_RX_INIT_BIT BIT(30)
246 #define PHY_RX_INIT_DONE_BIT BIT(0)
247 #define PHY_PLL_READY_RX_BIT BIT(2)
248 #define PHY_PLL_READY_TX_BIT BIT(3)