51 	uint32_t odt;  member
218 	ptiming_config->odt = (mmio_read_32(PHY_REG(0, 5)) >> 16) & 0x1;  in sdram_timing_cfg_init()
638 		if (timing_config->odt) {  in gen_rk3399_ctl_params_f0()
887 		if (timing_config->odt) {  in gen_rk3399_ctl_params_f1()
1930 	rk3399_dram_status.timing_config.odt = arg2 & 0x1;  in dram_set_odt_pd()
1992 	if (rk3399_dram_status.timing_config.odt == 1)  in prepare_ddr_timing()
2041 	if (rk3399_dram_status.timing_config.odt == 0)  in ddr_set_rate()
2075 	rk3399_suspend_status.odt = rk3399_dram_status.timing_config.odt;  in ddr_prepare_for_sys_suspend()
2077 	rk3399_dram_status.timing_config.odt = 1;  in ddr_prepare_for_sys_suspend()
2100 	rk3399_dram_status.timing_config.odt = rk3399_suspend_status.odt;  in ddr_prepare_for_sys_resume()
2112 	gen_rk3399_set_odt(rk3399_dram_status.timing_config.odt);  in ddr_prepare_for_sys_resume()