61 static void uniphier_nand_host_write(struct uniphier_nand *nand,  in uniphier_nand_host_write()  argument
64 	mmio_write_32(nand->host_base + DENALI_HOST_ADDR, addr);  in uniphier_nand_host_write()
65 	mmio_write_32(nand->host_base + DENALI_HOST_DATA, data);  in uniphier_nand_host_write()
68 static uint32_t uniphier_nand_host_read(struct uniphier_nand *nand,  in uniphier_nand_host_read()  argument
71 	mmio_write_32(nand->host_base + DENALI_HOST_ADDR, addr);  in uniphier_nand_host_read()
72 	return mmio_read_32(nand->host_base + DENALI_HOST_DATA);  in uniphier_nand_host_read()
75 static int uniphier_nand_block_isbad(struct uniphier_nand *nand, int block)  in uniphier_nand_block_isbad()  argument
77 	int page = nand->pages_per_block * block;  in uniphier_nand_block_isbad()
78 	int column = nand->page_size;  in uniphier_nand_block_isbad()
84 	if (block < ARRAY_SIZE(nand->bbt) &&  in uniphier_nand_block_isbad()
85 	    nand->bbt[block] != UNIPHIER_NAND_BBT_UNKNOWN)  in uniphier_nand_block_isbad()
86 		return nand->bbt[block];  in uniphier_nand_block_isbad()
88 	mmio_write_32(nand->reg_base + DENALI_ECC_ENABLE, 0);  in uniphier_nand_block_isbad()
90 	mmio_write_32(nand->reg_base + DENALI_INTR_STATUS0, -1);  in uniphier_nand_block_isbad()
92 	uniphier_nand_host_write(nand, DENALI_MAP11_CMD, NAND_CMD_READ0);  in uniphier_nand_block_isbad()
93 	uniphier_nand_host_write(nand, DENALI_MAP11_ADDR, column & 0xff);  in uniphier_nand_block_isbad()
94 	uniphier_nand_host_write(nand, DENALI_MAP11_ADDR, (column >> 8) & 0xff);  in uniphier_nand_block_isbad()
95 	uniphier_nand_host_write(nand, DENALI_MAP11_ADDR, page & 0xff);  in uniphier_nand_block_isbad()
96 	uniphier_nand_host_write(nand, DENALI_MAP11_ADDR, (page >> 8) & 0xff);  in uniphier_nand_block_isbad()
97 	if (!nand->two_row_addr_cycles)  in uniphier_nand_block_isbad()
98 		uniphier_nand_host_write(nand, DENALI_MAP11_ADDR,  in uniphier_nand_block_isbad()
100 	uniphier_nand_host_write(nand, DENALI_MAP11_CMD, NAND_CMD_READSTART);  in uniphier_nand_block_isbad()
103 		status = mmio_read_32(nand->reg_base + DENALI_INTR_STATUS0);  in uniphier_nand_block_isbad()
106 	bbm = uniphier_nand_host_read(nand, DENALI_MAP11_DATA);  in uniphier_nand_block_isbad()
111 	if (block < ARRAY_SIZE(nand->bbt))  in uniphier_nand_block_isbad()
112 		nand->bbt[block] = is_bad;  in uniphier_nand_block_isbad()
120 static int uniphier_nand_read_pages(struct uniphier_nand *nand, uintptr_t buf,  in uniphier_nand_read_pages()  argument
125 	mmio_write_32(nand->reg_base + DENALI_ECC_ENABLE, 1);  in uniphier_nand_read_pages()
126 	mmio_write_32(nand->reg_base + DENALI_DMA_ENABLE, 1);  in uniphier_nand_read_pages()
128 	mmio_write_32(nand->reg_base + DENALI_INTR_STATUS0, -1);  in uniphier_nand_read_pages()
131 	mmio_write_32(nand->host_base + DENALI_HOST_ADDR,  in uniphier_nand_read_pages()
138 	mmio_write_32(nand->host_base + DENALI_HOST_DATA,  in uniphier_nand_read_pages()
142 	mmio_write_32(nand->host_base + DENALI_HOST_DATA, buf);  in uniphier_nand_read_pages()
145 	mmio_write_32(nand->host_base + DENALI_HOST_DATA, buf >> 32);  in uniphier_nand_read_pages()
148 		status = mmio_read_32(nand->reg_base + DENALI_INTR_STATUS0);  in uniphier_nand_read_pages()
151 	mmio_write_32(nand->reg_base + DENALI_DMA_ENABLE, 0);  in uniphier_nand_read_pages()
162 static size_t __uniphier_nand_read(struct uniphier_nand *nand, int lba,  in __uniphier_nand_read()  argument
165 	int pages_per_block = nand->pages_per_block;  in __uniphier_nand_read()
166 	int page_size = nand->page_size;  in __uniphier_nand_read()
175 		ret = uniphier_nand_block_isbad(nand, block);  in __uniphier_nand_read()
186 		ret = uniphier_nand_block_isbad(nand, block);  in __uniphier_nand_read()
197 		ret = uniphier_nand_read_pages(nand, p,  in __uniphier_nand_read()
234 static int uniphier_nand_hw_init(struct uniphier_nand *nand)  in uniphier_nand_hw_init()  argument
238 	for (i = 0; i < ARRAY_SIZE(nand->bbt); i++)  in uniphier_nand_hw_init()
239 		nand->bbt[i] = UNIPHIER_NAND_BBT_UNKNOWN;  in uniphier_nand_hw_init()
241 	nand->reg_base = nand->host_base + 0x100000;  in uniphier_nand_hw_init()
243 	nand->pages_per_block =  in uniphier_nand_hw_init()
244 			mmio_read_32(nand->reg_base + DENALI_PAGES_PER_BLOCK);  in uniphier_nand_hw_init()
246 	nand->page_size =  in uniphier_nand_hw_init()
247 		mmio_read_32(nand->reg_base + DENALI_DEVICE_MAIN_AREA_SIZE);  in uniphier_nand_hw_init()
249 	if (mmio_read_32(nand->reg_base + DENALI_TWO_ROW_ADDR_CYCLES) & BIT(0))  in uniphier_nand_hw_init()
250 		nand->two_row_addr_cycles = 1;  in uniphier_nand_hw_init()
252 	uniphier_nand_host_write(nand, DENALI_MAP10,  in uniphier_nand_hw_init()