24 		add_str(&result, " ; op_count: %u", arm->op_count);  in get_detail_arm()
32 				add_str(&result, " ; operands[%u].type: REG = %s", i, cs_reg_name(*handle, op->reg));  in get_detail_arm()
35 				add_str(&result, " ; operands[%u].type: IMM = 0x%x", i, op->imm);  in get_detail_arm()
40 				add_str(&result, " ; operands[%u].type: FP = <float_point_unsupported>", i);  in get_detail_arm()
42 				add_str(&result, " ; operands[%u].type: FP = %f", i, op->fp);  in get_detail_arm()
46 				add_str(&result, " ; operands[%u].type: MEM", i);  in get_detail_arm()
48 					add_str(&result, " ; operands[%u].mem.base: REG = %s", i, cs_reg_name(*handle, op->mem.base));  in get_detail_arm()
50 …			add_str(&result, " ; operands[%u].mem.index: REG = %s", i, cs_reg_name(*handle, op->mem.index));  in get_detail_arm()
52 					add_str(&result, " ; operands[%u].mem.scale: %d", i, op->mem.scale);  in get_detail_arm()
54 					add_str(&result, " ; operands[%u].mem.disp: 0x%x", i, op->mem.disp);  in get_detail_arm()
56 					add_str(&result, " ; operands[%u].mem.lshift: 0x%x", i, op->mem.lshift);  in get_detail_arm()
60 				add_str(&result, " ; operands[%u].type: P-IMM = %u", i, op->imm);  in get_detail_arm()
63 				add_str(&result, " ; operands[%u].type: C-IMM = %u", i, op->imm);  in get_detail_arm()
66 …add_str(&result, " ; operands[%u].type: SETEND = %s", i, op->setend == ARM_SETEND_BE? "be" : "le");  in get_detail_arm()
69 				add_str(&result, " ; operands[%u].type: SYSREG = %u", i, op->reg);  in get_detail_arm()
74 			add_str(&result, " ; operands[%u].neon_lane = %u", i, op->neon_lane);  in get_detail_arm()
81 				add_str(&result, " ; operands[%u].access: READ", i);  in get_detail_arm()
84 				add_str(&result, " ; operands[%u].access: WRITE", i);  in get_detail_arm()
87 				add_str(&result, " ; operands[%u].access: READ | WRITE", i);  in get_detail_arm()
93 				add_str(&result, " ; Shift: %u = %u", op->shift.type, op->shift.value);  in get_detail_arm()
95 				add_str(&result, " ; Shift: %u = %s", op->shift.type, cs_reg_name(*handle, op->shift.value));  in get_detail_arm()
99 			add_str(&result, " ; operands[%u].vector_index = %u", i, op->vector_index);  in get_detail_arm()
103 			add_str(&result, " ; Subtracted: True");  in get_detail_arm()
107 		add_str(&result, " ; Code condition: %u", arm->cc);  in get_detail_arm()
110 		add_str(&result, " ; Update-flags: True");  in get_detail_arm()
113 		add_str(&result, " ; Write-back: True");  in get_detail_arm()
116 		add_str(&result, " ; CPSI-mode: %u", arm->cps_mode);  in get_detail_arm()
119 		add_str(&result, " ; CPSI-flag: %u", arm->cps_flag);  in get_detail_arm()
122 		add_str(&result, " ; Vector-data: %u", arm->vector_data);  in get_detail_arm()
125 		add_str(&result, " ; Vector-size: %u", arm->vector_size);  in get_detail_arm()
128 		add_str(&result, " ; User-mode: True");  in get_detail_arm()
131 		add_str(&result, " ; Memory-barrier: %u", arm->mem_barrier);  in get_detail_arm()
135 			add_str(&result, " ; Registers read:");  in get_detail_arm()
137 				add_str(&result, " %s", cs_reg_name(*handle, regs_read[i]));  in get_detail_arm()
142 			add_str(&result, " ; Registers modified:");  in get_detail_arm()
144 				add_str(&result, " %s", cs_reg_name(*handle, regs_write[i]));  in get_detail_arm()