11 	add_str(result, "%s", comment);  in print_string_hex()
13 		add_str(result, "0x%02x", *c & 0xff);  in print_string_hex()
15 			add_str(result, " ");  in print_string_hex()
208 	add_str(&result, " ; rex: 0x%x", x86->rex);  in get_detail_x86()
209 	add_str(&result, " ; addr_size: %u", x86->addr_size);  in get_detail_x86()
210 	add_str(&result, " ; modrm: 0x%x", x86->modrm);  in get_detail_x86()
211 	add_str(&result, " ; disp: 0x%" PRIx64 "", x86->disp);  in get_detail_x86()
214 		add_str(&result, " ; sib: 0x%x", x86->sib);  in get_detail_x86()
216 			add_str(&result, " ; sib_base: %s", cs_reg_name(*ud, x86->sib_base));  in get_detail_x86()
218 			add_str(&result, " ; sib_index: %s", cs_reg_name(*ud, x86->sib_index));  in get_detail_x86()
220 			add_str(&result, " ; sib_scale: %d", x86->sib_scale);  in get_detail_x86()
224 		add_str(&result, " ; xop_cc: %u", x86->xop_cc);  in get_detail_x86()
228 		add_str(&result, " ; sse_cc: %u", x86->sse_cc);  in get_detail_x86()
232 		add_str(&result, " ; avx_cc: %u", x86->avx_cc);  in get_detail_x86()
236 		add_str(&result, " ; avx_sae: %u", x86->avx_sae);  in get_detail_x86()
240 		add_str(&result, " ; avx_rm: %u", x86->avx_rm);  in get_detail_x86()
245 		add_str(&result, " ; imm_count: %u", count);  in get_detail_x86()
248 			add_str(&result, " ; imms[%u]: 0x%" PRIx64 "", i, x86->operands[index].imm);  in get_detail_x86()
253 		add_str(&result, " ; op_count: %u", x86->op_count);  in get_detail_x86()
260 				add_str(&result, " ; operands[%u].type: REG = %s", i, cs_reg_name(*ud, op->reg));  in get_detail_x86()
263 				add_str(&result, " ; operands[%u].type: IMM = 0x%" PRIx64 "", i, op->imm);  in get_detail_x86()
266 				add_str(&result, " ; operands[%u].type: MEM", i);  in get_detail_x86()
268 …			add_str(&result, " ; operands[%u].mem.segment: REG = %s", i, cs_reg_name(*ud, op->mem.segment));  in get_detail_x86()
270 					add_str(&result, " ; operands[%u].mem.base: REG = %s", i, cs_reg_name(*ud, op->mem.base));  in get_detail_x86()
272 					add_str(&result, " ; operands[%u].mem.index: REG = %s", i, cs_reg_name(*ud, op->mem.index));  in get_detail_x86()
274 					add_str(&result, " ; operands[%u].mem.scale: %u", i, op->mem.scale);  in get_detail_x86()
276 					add_str(&result, " ; operands[%u].mem.disp: 0x%" PRIx64 "", i, op->mem.disp);  in get_detail_x86()
283 			add_str(&result, " ; operands[%u].avx_bcast: %u", i, op->avx_bcast);  in get_detail_x86()
286 			add_str(&result, " ; operands[%u].avx_zero_opmask: TRUE", i);  in get_detail_x86()
288 		add_str(&result, " ; operands[%u].size: %u", i, op->size);  in get_detail_x86()
294 				add_str(&result, " ; operands[%u].access: READ", i);  in get_detail_x86()
297 				add_str(&result, " ; operands[%u].access: WRITE", i);  in get_detail_x86()
300 				add_str(&result, " ; operands[%u].access: READ | WRITE", i);  in get_detail_x86()
307 			add_str(&result, " ; Registers read:");  in get_detail_x86()
309 				add_str(&result, " %s", cs_reg_name(*ud, regs_read[i]));  in get_detail_x86()
314 			add_str(&result, " ; Registers modified:");  in get_detail_x86()
316 				add_str(&result, " %s", cs_reg_name(*ud, regs_write[i]));  in get_detail_x86()
324 				add_str(&result, " ; FPU_FLAGS:");  in get_detail_x86()
327 						add_str(&result, " %s", get_fpu_flag_name((uint64_t)1 << i));  in get_detail_x86()
334 			add_str(&result, " ; EFLAGS:");  in get_detail_x86()
337 					add_str(&result, " %s", get_eflag_name((uint64_t)1 << i));  in get_detail_x86()