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24 		 *   4KB, 64KB, 1MB and 16MB in addition to the LPAE page sizes of 2MB and 1G.
33 * - TLB entries that support 4KB, 64KB, 1MB, and 16MB pages
60 …* the -l1tlb_1m option, to have the L1 data TLB cache entries at both the 4KB and 1MB granulari…
61 …* With this configuration, any translation that results in a 1MB or larger page is cached in th…
62 …* TLB as a 1MB entry. Any translation that results in a page smaller than 1MB is cached in the …
66 …et-associative structure. The L2 TLB supports all the VMSAv7 page sizes of 4K, 64K, 1MB and 16MB in
67 * addition to the LPAE page sizes of 2MB and 1GB.
75 …* caches entries at the 4KB and 1MB granularity of Virtual Address (VA) to Physical Address (PA…
76 …y. If the translation tables map the memory region to a larger granularity than 4KB or 1MB, it only
80 * entries have a 4KB and 1MB granularity of VA to PA mappings only.
83 …set-associative structure. The main TLB supports all the VMSAv7 page sizes of 4K, 64K, 1MB and 16MB
84 * in addition to the LPAE page sizes of 2MB and 1GB.
97 * it into 512MB blocks and stores the appropriate block for the lookup.
109 * split into 512MB blocks and the appropriate block for the lookup stored.
117 …* different page sizes, natively 4KB, 64KB, and 1MB, of VA to PA mappings. If the page tables m…
118 …* region to a larger granularity than 1MB, it only allocates one mapping for the particular 1MB
122 …* caches entries of three different page sizes, natively 4KB, 64KB, and 1MB, of VA to PA mappin…
125 …* set-associative structure. The L2 TLB supports the page sizes of 4K, 64K, 1MB and 16MB. It al…
126 …* page sizes of 2MB and 1GB for the long descriptor format translation in AArch32 state and in …
127 …* when using the 4KB translation granule. In addition, the L2 TLB supports the 512MB page map s…