Lines Matching refs:cpuinfo_get_l3_caches_count
1235 EXPECT_LE(cpuinfo_get_l3_caches_count(), cpuinfo_get_processors_count()); in TEST()
1236 EXPECT_LE(cpuinfo_get_l3_caches_count(), cpuinfo_get_l2_caches_count()); in TEST()
1242 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { in TEST()
1250 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { in TEST()
1261 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { in TEST()
1273 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { in TEST()
1284 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { in TEST()
1295 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { in TEST()
1306 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { in TEST()
1319 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { in TEST()
1333 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { in TEST()
1344 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { in TEST()
1355 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { in TEST()
1367 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { in TEST()
1384 EXPECT_LE(cpuinfo_get_l4_caches_count(), cpuinfo_get_l3_caches_count()); in TEST()