Lines Matching refs:ArgumentError

105 class ArgumentError(Error):  class
112     raise ArgumentError('Only vector registers can have type appended.')
127     raise ArgumentError('Unknown type: %s' % type_name)
147     raise ArgumentError('No wide type for: %s' % type_name)
154     raise ArgumentError('No narrow type for: %s' % type_name)
187     raise ArgumentError('Unknown type: %s' % type_name)
193     raise ArgumentError('Cannot mix lanes on a register list.')
199     raise ArgumentError('Cannot construct a list with all lane indexing.')
551       raise ArgumentError('Register sizes do not match.')
666       raise ArgumentError('Convert not supported, to: %s from: %s' % (cvt_to,
708       raise ArgumentError('Register sizes do not match.')
734       raise ArgumentError('Register sizes do not match.')
849       raise ArgumentError('Cannot mix double and quad loads.')
852       raise ArgumentError('To few destinations: %d to load %d bits.' %
902         raise ArgumentError('Wrong leftover: %d' % bits_to_load)
965       raise ArgumentError('Cannot mix double and quad stores.')
968       raise ArgumentError('To few destinations: %d to store %d bits.' %
1018         raise ArgumentError('Wrong leftover: %d' % bits_to_store)
1033       raise ArgumentError('Unsupported store_type: %d' % store_type)
1055       raise ArgumentError('To many elements: %d' % count)
1061       raise ArgumentError('Unsupported reduce: %s' % reduce_type)
1064       raise ArgumentError('To few destinations: %d (%d needed)' %
1068       raise ArgumentError('To few sources: %d' % len(sources))
1071       raise ArgumentError('Unsupported reduce_count: %d' % reduce_count)
1270       raise ArgumentError('Lane to big: (%d + 1) x %d > %d' %