Lines Matching full:reg
34 gen8_set_dst(struct gen8_instruction *inst, struct brw_reg reg) in gen8_set_dst() argument
37 if (reg.file == BRW_MESSAGE_REGISTER_FILE) { in gen8_set_dst()
38 reg.file = BRW_GENERAL_REGISTER_FILE; in gen8_set_dst()
39 reg.nr += GEN7_MRF_HACK_START; in gen8_set_dst()
42 assert(reg.file != BRW_MESSAGE_REGISTER_FILE); in gen8_set_dst()
44 if (reg.file == BRW_GENERAL_REGISTER_FILE) in gen8_set_dst()
45 assert(reg.nr < BRW_MAX_GRF); in gen8_set_dst()
47 gen8_set_dst_reg_file(inst, reg.file); in gen8_set_dst()
48 gen8_set_dst_reg_type(inst, reg.type); in gen8_set_dst()
50 if (reg.address_mode == BRW_ADDRESS_DIRECT) { in gen8_set_dst()
51 gen8_set_dst_da_reg_nr(inst, reg.nr); in gen8_set_dst()
55 gen8_set_dst_da1_subreg_nr(inst, reg.subnr); in gen8_set_dst()
58 if (reg.hstride == BRW_HORIZONTAL_STRIDE_0) in gen8_set_dst()
59 reg.hstride = BRW_HORIZONTAL_STRIDE_1; in gen8_set_dst()
60 gen8_set_dst_da1_hstride(inst, reg.hstride); in gen8_set_dst()
63 assert(reg.subnr == 0 || reg.subnr == 16); in gen8_set_dst()
64 gen8_set_dst_da16_subreg_nr(inst, reg.subnr >> 4); in gen8_set_dst()
65 gen8_set_da16_writemask(inst, reg.dw1.bits.writemask); in gen8_set_dst()
73 if (reg.hstride == BRW_HORIZONTAL_STRIDE_0) in gen8_set_dst()
74 reg.hstride = BRW_HORIZONTAL_STRIDE_1; in gen8_set_dst()
75 gen8_set_dst_da1_hstride(inst, reg.hstride); in gen8_set_dst()
76 gen8_set_dst_ida1_sub_nr(inst, reg.subnr); in gen8_set_dst()
77 gen8_set_dst_ida1_imm8(inst, (reg.dw1.bits.indirect_offset & IMM8_MASK)); in gen8_set_dst()
78 if ((reg.dw1.bits.indirect_offset & IMM9_MASK) == IMM9_MASK) in gen8_set_dst()
88 if (reg.width < BRW_EXECUTE_8) in gen8_set_dst()
89 gen8_set_exec_size(inst, reg.width); in gen8_set_dst()
93 gen8_validate_reg(struct gen8_instruction *inst, struct brw_reg reg) in gen8_validate_reg() argument
101 if (reg.file == BRW_IMMEDIATE_VALUE) { in gen8_validate_reg()
106 if (reg.file == BRW_ARCHITECTURE_REGISTER_FILE) in gen8_validate_reg()
109 assert(reg.hstride >= 0 && reg.hstride < Elements(hstride_for_reg)); in gen8_validate_reg()
110 hstride = hstride_for_reg[reg.hstride]; in gen8_validate_reg()
112 if (reg.vstride == 0xf) { in gen8_validate_reg()
115 assert(reg.vstride >= 0 && reg.vstride < Elements(vstride_for_reg)); in gen8_validate_reg()
116 vstride = vstride_for_reg[reg.vstride]; in gen8_validate_reg()
119 assert(reg.width >= 0 && reg.width < Elements(width_for_reg)); in gen8_validate_reg()
120 width = width_for_reg[reg.width]; in gen8_validate_reg()
160 gen8_set_src0(struct gen8_instruction *inst, struct brw_reg reg) in gen8_set_src0() argument
163 if (reg.file == BRW_MESSAGE_REGISTER_FILE) { in gen8_set_src0()
164 reg.file = BRW_GENERAL_REGISTER_FILE; in gen8_set_src0()
165 reg.nr += GEN7_MRF_HACK_START; in gen8_set_src0()
168 if (reg.file == BRW_GENERAL_REGISTER_FILE) in gen8_set_src0()
169 assert(reg.nr < BRW_MAX_GRF); in gen8_set_src0()
171 gen8_validate_reg(inst, reg); in gen8_set_src0()
173 gen8_set_src0_reg_file(inst, reg.file); in gen8_set_src0()
174 gen8_set_src0_reg_type(inst, reg.type); in gen8_set_src0()
175 gen8_set_src0_abs(inst, reg.abs); in gen8_set_src0()
176 gen8_set_src0_negate(inst, reg.negate); in gen8_set_src0()
179 if (reg.file == BRW_IMMEDIATE_VALUE) { in gen8_set_src0()
180 inst->data[3] = reg.dw1.ud; in gen8_set_src0()
184 gen8_set_src1_reg_type(inst, reg.type); in gen8_set_src0()
185 } else if (reg.address_mode == BRW_ADDRESS_DIRECT) { in gen8_set_src0()
186 gen8_set_src0_da_reg_nr(inst, reg.nr); in gen8_set_src0()
190 gen8_set_src0_da1_subreg_nr(inst, reg.subnr); in gen8_set_src0()
192 if (reg.width == BRW_WIDTH_1 && in gen8_set_src0()
197 gen8_set_src0_da1_hstride(inst, reg.hstride); in gen8_set_src0()
198 gen8_set_src0_vert_stride(inst, reg.vstride); in gen8_set_src0()
200 gen8_set_src0_da1_width(inst, reg.width); in gen8_set_src0()
204 assert(reg.subnr == 0 || reg.subnr == 16); in gen8_set_src0()
205 gen8_set_src0_da16_subreg_nr(inst, reg.subnr >> 4); in gen8_set_src0()
208 BRW_GET_SWZ(reg.dw1.bits.swizzle, in gen8_set_src0()
211 BRW_GET_SWZ(reg.dw1.bits.swizzle, in gen8_set_src0()
214 BRW_GET_SWZ(reg.dw1.bits.swizzle, in gen8_set_src0()
217 BRW_GET_SWZ(reg.dw1.bits.swizzle, in gen8_set_src0()
223 if (reg.vstride == BRW_VERTICAL_STRIDE_8) in gen8_set_src0()
226 gen8_set_src0_vert_stride(inst, reg.vstride); in gen8_set_src0()
228 } else if (reg.address_mode == BRW_ADDRESS_REGISTER_INDIRECT_REGISTER) { in gen8_set_src0()
230 if (reg.width == BRW_WIDTH_1 && in gen8_set_src0()
235 gen8_set_src0_da1_hstride(inst, reg.hstride); in gen8_set_src0()
236 gen8_set_src0_vert_stride(inst, reg.vstride); in gen8_set_src0()
239 gen8_set_src0_da1_width(inst, reg.width); in gen8_set_src0()
240 gen8_set_src0_ida1_sub_nr(inst, reg.subnr); in gen8_set_src0()
242 gen8_set_src0_ida1_imm8(inst, (reg.dw1.bits.indirect_offset & IMM8_MASK)); in gen8_set_src0()
243 if ((reg.dw1.bits.indirect_offset & IMM9_MASK) == IMM9_MASK) in gen8_set_src0()
251 gen8_set_src1(struct gen8_instruction *inst, struct brw_reg reg) in gen8_set_src1() argument
254 if (reg.file == BRW_MESSAGE_REGISTER_FILE) { in gen8_set_src1()
255 reg.file = BRW_GENERAL_REGISTER_FILE; in gen8_set_src1()
256 reg.nr += GEN7_MRF_HACK_START; in gen8_set_src1()
259 if (reg.file == BRW_GENERAL_REGISTER_FILE) in gen8_set_src1()
260 assert(reg.nr < BRW_MAX_GRF); in gen8_set_src1()
262 gen8_validate_reg(inst, reg); in gen8_set_src1()
264 gen8_set_src1_reg_file(inst, reg.file); in gen8_set_src1()
265 gen8_set_src1_reg_type(inst, reg.type); in gen8_set_src1()
266 gen8_set_src1_abs(inst, reg.abs); in gen8_set_src1()
267 gen8_set_src1_negate(inst, reg.negate); in gen8_set_src1()
272 if (reg.file == BRW_IMMEDIATE_VALUE) { in gen8_set_src1()
273 inst->data[3] = reg.dw1.ud; in gen8_set_src1()
274 } else if (reg.address_mode == BRW_ADDRESS_DIRECT) { in gen8_set_src1()
275 gen8_set_src1_da_reg_nr(inst, reg.nr); in gen8_set_src1()
279 gen8_set_src1_da1_subreg_nr(inst, reg.subnr); in gen8_set_src1()
281 if (reg.width == BRW_WIDTH_1 && in gen8_set_src1()
286 gen8_set_src1_da1_hstride(inst, reg.hstride); in gen8_set_src1()
287 gen8_set_src1_vert_stride(inst, reg.vstride); in gen8_set_src1()
289 gen8_set_src1_da1_width(inst, reg.width); in gen8_set_src1()
292 assert(reg.subnr == 0 || reg.subnr == 16); in gen8_set_src1()
293 gen8_set_src1_da16_subreg_nr(inst, reg.subnr >> 4); in gen8_set_src1()
296 BRW_GET_SWZ(reg.dw1.bits.swizzle, in gen8_set_src1()
299 BRW_GET_SWZ(reg.dw1.bits.swizzle, in gen8_set_src1()
302 BRW_GET_SWZ(reg.dw1.bits.swizzle, in gen8_set_src1()
305 BRW_GET_SWZ(reg.dw1.bits.swizzle, in gen8_set_src1()
311 if (reg.vstride == BRW_VERTICAL_STRIDE_8) in gen8_set_src1()
314 gen8_set_src1_vert_stride(inst, reg.vstride); in gen8_set_src1()
316 } else if (reg.address_mode == BRW_ADDRESS_REGISTER_INDIRECT_REGISTER) { in gen8_set_src1()
318 if (reg.width == BRW_WIDTH_1 && in gen8_set_src1()
323 gen8_set_src1_da1_hstride(inst, reg.hstride); in gen8_set_src1()
324 gen8_set_src1_vert_stride(inst, reg.vstride); in gen8_set_src1()
327 gen8_set_src1_da1_width(inst, reg.width); in gen8_set_src1()
328 gen8_set_src1_ida1_sub_nr(inst, reg.subnr); in gen8_set_src1()
330 gen8_set_src1_ida1_imm8(inst, (reg.dw1.bits.indirect_offset & IMM8_MASK)); in gen8_set_src1()
331 if ((reg.dw1.bits.indirect_offset & IMM9_MASK) == IMM9_MASK) in gen8_set_src1()