Lines Matching refs:GEN
44 #define GEN(i) (&(i)->insn.gen) macro
266 return GEN(insn)->header.access_mode; in access_mode()
274 return GEN(insn)->header.execution_size; in exec_size()
282 GEN(insn)->header.execution_size = execsize; in set_execsize()
810 GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH;
811 GEN(&$$)->bits1.da1.dest_horiz_stride = 1;
812 GEN(&$$)->bits1.da1.src1_reg_file = BRW_ARCHITECTURE_REGISTER_FILE;
813 GEN(&$$)->bits1.da1.src1_reg_type = BRW_REGISTER_TYPE_UD;
836 GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH;
867 GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH;
906 GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH;
958 GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH;
973 GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH;
1058 get_type_size(GEN(&$$)->bits1.da1.dest_reg_type) * (1 << $6.width) == 64)
1059 GEN(&$$)->header.compression_control = BRW_COMPRESSION_COMPRESSED;
1086 get_type_size(GEN(&$$)->bits1.da1.dest_reg_type) * (1 << $6.width) == 64)
1087 GEN(&$$)->header.compression_control = BRW_COMPRESSION_COMPRESSED;
1114 get_type_size(GEN(&$$)->bits1.da1.dest_reg_type) * (1 << $6.width) == 64)
1115 GEN(&$$)->header.compression_control = BRW_COMPRESSION_COMPRESSED;
1168 GEN(&$$)->header.destreg__conditionalmod = $4; /* msg reg index */
1201 GEN(&$$)->bits1.da1.src1_reg_file = BRW_IMMEDIATE_VALUE;
1202 GEN(&$$)->bits1.da1.src1_reg_type = BRW_REGISTER_TYPE_D;
1213 GEN(&$$)->header.destreg__conditionalmod = GEN(&$7)->bits2.send_gen5.sfid;
1215 GEN(&$$)->header.destreg__conditionalmod = $4; /* msg reg index */
1216 GEN(&$$)->bits2.send_gen5.sfid = GEN(&$7)->bits2.send_gen5.sfid;
1217 GEN(&$$)->bits2.send_gen5.end_of_thread = $12.end_of_thread;
1220 GEN(&$$)->bits3.generic_gen5 = GEN(&$7)->bits3.generic_gen5;
1221 GEN(&$$)->bits3.generic_gen5.msg_length = $9;
1222 GEN(&$$)->bits3.generic_gen5.response_length = $11;
1223 GEN(&$$)->bits3.generic_gen5.end_of_thread = $12.end_of_thread;
1225 GEN(&$$)->header.destreg__conditionalmod = $4; /* msg reg index */
1226 GEN(&$$)->bits3.generic = GEN(&$7)->bits3.generic;
1227 GEN(&$$)->bits3.generic.msg_length = $9;
1228 GEN(&$$)->bits3.generic.response_length = $11;
1229 GEN(&$$)->bits3.generic.end_of_thread = $12.end_of_thread;
1239 GEN(&$$)->header.destreg__conditionalmod = $5.nr; /* msg reg index */
1266 GEN(&$$)->header.destreg__conditionalmod = $5.nr; /* msg reg index */
1323 … GEN(&$$)->header.destreg__conditionalmod = ($6 & EX_DESC_SFID_MASK); /* SFID */
1324 GEN(&$$)->bits3.generic_gen5.end_of_thread = !!($6 & EX_DESC_EOT_MASK);
1374 … GEN(&$$)->header.destreg__conditionalmod = ($6 & EX_DESC_SFID_MASK); /* SFID */
1375 GEN(&$$)->bits3.generic_gen5.end_of_thread = !!($6 & EX_DESC_EOT_MASK);
1391 GEN(&$$)->header.destreg__conditionalmod = $5.nr; /* msg reg index */
1403 GEN(&$$)->bits2.send_gen5.sfid = ($7 & EX_DESC_SFID_MASK);
1404 GEN(&$$)->bits3.generic_gen5.end_of_thread = !!($7 & EX_DESC_EOT_MASK);
1414 GEN(&$$)->header.destreg__conditionalmod = $5.nr; /* msg reg index */
1427 GEN(&$$)->bits2.send_gen5.sfid = $7;
1452 GEN(&$$)->header.mask_control = BRW_MASK_DISABLE;
1472 GEN(&$$)->header.destreg__conditionalmod = $7;
1544 GEN(&$$)->bits2.send_gen5.sfid= BRW_SFID_NULL;
1545 GEN(&$$)->bits3.generic_gen5.header_present = 0; /* ??? */
1547 GEN(&$$)->bits3.generic.msg_target = BRW_SFID_NULL;
1560 GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_SAMPLER;
1561 GEN(&$$)->bits3.generic_gen5.header_present = 1; /* ??? */
1562 GEN(&$$)->bits3.sampler_gen7.binding_table_index = $3;
1563 GEN(&$$)->bits3.sampler_gen7.sampler = $5;
1564 … GEN(&$$)->bits3.sampler_gen7.simd_mode = 2; /* SIMD16, maybe we should add a new parameter */
1566 GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_SAMPLER;
1567 GEN(&$$)->bits3.generic_gen5.header_present = 1; /* ??? */
1568 GEN(&$$)->bits3.sampler_gen5.binding_table_index = $3;
1569 GEN(&$$)->bits3.sampler_gen5.sampler = $5;
1570 … GEN(&$$)->bits3.sampler_gen5.simd_mode = 2; /* SIMD16, maybe we should add a new parameter */
1572 GEN(&$$)->bits3.generic.msg_target = BRW_SFID_SAMPLER;
1573 GEN(&$$)->bits3.sampler.binding_table_index = $3;
1574 GEN(&$$)->bits3.sampler.sampler = $5;
1577 GEN(&$$)->bits3.sampler.return_format =
1581 GEN(&$$)->bits3.sampler.return_format =
1585 GEN(&$$)->bits3.sampler.return_format =
1596 GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_MATH;
1597 GEN(&$$)->bits3.generic_gen5.header_present = 0;
1598 GEN(&$$)->bits3.math_gen5.function = $2;
1600 GEN(&$$)->bits3.math_gen5.int_type = $4;
1601 GEN(&$$)->bits3.math_gen5.precision = BRW_MATH_PRECISION_FULL;
1602 GEN(&$$)->bits3.math_gen5.data_type = $5;
1604 GEN(&$$)->bits3.generic.msg_target = BRW_SFID_MATH;
1605 GEN(&$$)->bits3.math.function = $2;
1607 GEN(&$$)->bits3.math.int_type = $4;
1608 GEN(&$$)->bits3.math.precision = BRW_MATH_PRECISION_FULL;
1609 GEN(&$$)->bits3.math.data_type = $5;
1615 GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_MESSAGE_GATEWAY;
1616 GEN(&$$)->bits3.generic_gen5.header_present = 0; /* ??? */
1618 GEN(&$$)->bits3.generic.msg_target = BRW_SFID_MESSAGE_GATEWAY;
1652 GEN(&$$)->bits2.send_gen5.sfid =
1654 GEN(&$$)->bits3.generic_gen5.header_present = 1;
1655 GEN(&$$)->bits3.gen7_dp.binding_table_index = $3;
1656 GEN(&$$)->bits3.gen7_dp.msg_control = $7;
1657 GEN(&$$)->bits3.gen7_dp.msg_type = $9;
1659 GEN(&$$)->bits2.send_gen5.sfid =
1661 GEN(&$$)->bits3.generic_gen5.header_present = 1;
1662 GEN(&$$)->bits3.gen6_dp_sampler_const_cache.binding_table_index = $3;
1663 GEN(&$$)->bits3.gen6_dp_sampler_const_cache.msg_control = $7;
1664 GEN(&$$)->bits3.gen6_dp_sampler_const_cache.msg_type = $9;
1666 GEN(&$$)->bits2.send_gen5.sfid =
1668 GEN(&$$)->bits3.generic_gen5.header_present = 1;
1669 GEN(&$$)->bits3.dp_read_gen5.binding_table_index = $3;
1670 GEN(&$$)->bits3.dp_read_gen5.target_cache = $5;
1671 GEN(&$$)->bits3.dp_read_gen5.msg_control = $7;
1672 GEN(&$$)->bits3.dp_read_gen5.msg_type = $9;
1674 GEN(&$$)->bits3.generic.msg_target =
1676 GEN(&$$)->bits3.dp_read.binding_table_index = $3;
1677 GEN(&$$)->bits3.dp_read.target_cache = $5;
1678 GEN(&$$)->bits3.dp_read.msg_control = $7;
1679 GEN(&$$)->bits3.dp_read.msg_type = $9;
1714 GEN(&$$)->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE;
1715 GEN(&$$)->bits3.generic_gen5.header_present = 1;
1716 GEN(&$$)->bits3.gen7_dp.binding_table_index = $3;
1717 GEN(&$$)->bits3.gen7_dp.msg_control = $5;
1718 GEN(&$$)->bits3.gen7_dp.msg_type = $7;
1720 GEN(&$$)->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE;
1725 GEN(&$$)->bits3.generic_gen5.header_present = 1;
1726 GEN(&$$)->bits3.gen6_dp.binding_table_index = $3;
1727 GEN(&$$)->bits3.gen6_dp.msg_control = $5;
1728 GEN(&$$)->bits3.gen6_dp.msg_type = $7;
1729 GEN(&$$)->bits3.gen6_dp.send_commit_msg = $9;
1731 GEN(&$$)->bits2.send_gen5.sfid =
1733 GEN(&$$)->bits3.generic_gen5.header_present = 1;
1734 GEN(&$$)->bits3.dp_write_gen5.binding_table_index = $3;
1735 GEN(&$$)->bits3.dp_write_gen5.last_render_target = ($5 & 0x8) >> 3;
1736 GEN(&$$)->bits3.dp_write_gen5.msg_control = $5 & 0x7;
1737 GEN(&$$)->bits3.dp_write_gen5.msg_type = $7;
1738 GEN(&$$)->bits3.dp_write_gen5.send_commit_msg = $9;
1740 GEN(&$$)->bits3.generic.msg_target =
1742 GEN(&$$)->bits3.dp_write.binding_table_index = $3;
1747 GEN(&$$)->bits3.dp_write.last_render_target = ($5 & 0x8) >> 3;
1748 GEN(&$$)->bits3.dp_write.msg_control = $5 & 0x7;
1749 GEN(&$$)->bits3.dp_write.msg_type = $7;
1750 GEN(&$$)->bits3.dp_write.send_commit_msg = $9;
1785 GEN(&$$)->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE;
1786 GEN(&$$)->bits3.generic_gen5.header_present = ($11 != 0);
1787 GEN(&$$)->bits3.gen7_dp.binding_table_index = $3;
1788 GEN(&$$)->bits3.gen7_dp.msg_control = $5;
1789 GEN(&$$)->bits3.gen7_dp.msg_type = $7;
1791 GEN(&$$)->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE;
1792 GEN(&$$)->bits3.generic_gen5.header_present = ($11 != 0);
1793 GEN(&$$)->bits3.gen6_dp.binding_table_index = $3;
1794 GEN(&$$)->bits3.gen6_dp.msg_control = $5;
1795 GEN(&$$)->bits3.gen6_dp.msg_type = $7;
1796 GEN(&$$)->bits3.gen6_dp.send_commit_msg = $9;
1798 GEN(&$$)->bits2.send_gen5.sfid =
1800 GEN(&$$)->bits3.generic_gen5.header_present = ($11 != 0);
1801 GEN(&$$)->bits3.dp_write_gen5.binding_table_index = $3;
1802 GEN(&$$)->bits3.dp_write_gen5.last_render_target = ($5 & 0x8) >> 3;
1803 GEN(&$$)->bits3.dp_write_gen5.msg_control = $5 & 0x7;
1804 GEN(&$$)->bits3.dp_write_gen5.msg_type = $7;
1805 GEN(&$$)->bits3.dp_write_gen5.send_commit_msg = $9;
1807 GEN(&$$)->bits3.generic.msg_target =
1809 GEN(&$$)->bits3.dp_write.binding_table_index = $3;
1814 GEN(&$$)->bits3.dp_write.last_render_target = ($5 & 0x8) >> 3;
1815 GEN(&$$)->bits3.dp_write.msg_control = $5 & 0x7;
1816 GEN(&$$)->bits3.dp_write.msg_type = $7;
1817 GEN(&$$)->bits3.dp_write.send_commit_msg = $9;
1822 GEN(&$$)->bits3.generic.msg_target = BRW_SFID_URB;
1824 GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_URB;
1825 GEN(&$$)->bits3.generic_gen5.header_present = 1;
1827 GEN(&$$)->bits3.urb_gen5.offset = $2;
1828 GEN(&$$)->bits3.urb_gen5.swizzle_control = $3;
1829 GEN(&$$)->bits3.urb_gen5.pad = 0;
1830 GEN(&$$)->bits3.urb_gen5.allocate = $4;
1831 GEN(&$$)->bits3.urb_gen5.used = $5;
1832 GEN(&$$)->bits3.urb_gen5.complete = $6;
1834 GEN(&$$)->bits3.generic.msg_target = BRW_SFID_URB;
1836 GEN(&$$)->bits3.urb.offset = $2;
1837 GEN(&$$)->bits3.urb.swizzle_control = $3;
1838 GEN(&$$)->bits3.urb.pad = 0;
1839 GEN(&$$)->bits3.urb.allocate = $4;
1840 GEN(&$$)->bits3.urb.used = $5;
1841 GEN(&$$)->bits3.urb.complete = $6;
1854 GEN(&$$)->bits3.generic.msg_target =
1857 GEN(&$$)->bits2.send_gen5.sfid =
1859 GEN(&$$)->bits3.generic_gen5.header_present = 0;
1860 GEN(&$$)->bits3.thread_spawner_gen5.opcode = $3;
1861 GEN(&$$)->bits3.thread_spawner_gen5.requester_type = $5;
1862 GEN(&$$)->bits3.thread_spawner_gen5.resource_select = $7;
1864 GEN(&$$)->bits3.generic.msg_target =
1866 GEN(&$$)->bits3.thread_spawner.opcode = $3;
1867 GEN(&$$)->bits3.thread_spawner.requester_type = $5;
1868 GEN(&$$)->bits3.thread_spawner.resource_select = $7;
1874 GEN(&$$)->bits3.generic.msg_target = GEN6_SFID_VME;
1882 GEN(&$$)->bits2.send_gen5.sfid = GEN6_SFID_VME;
1883 GEN(&$$)->bits3.vme_gen6.binding_table_index = $3;
1884 GEN(&$$)->bits3.vme_gen6.search_path_index = $5;
1885 GEN(&$$)->bits3.vme_gen6.lut_subindex = $7;
1886 GEN(&$$)->bits3.vme_gen6.message_type = $9;
1887 GEN(&$$)->bits3.generic_gen5.header_present = 1;
1903 GEN(&$$)->bits3.generic.msg_target = HSW_SFID_CRE;
1905 GEN(&$$)->bits2.send_gen5.sfid = HSW_SFID_CRE;
1906 GEN(&$$)->bits3.cre_gen75.binding_table_index = $3;
1907 GEN(&$$)->bits3.cre_gen75.message_type = $5;
1908 GEN(&$$)->bits3.generic_gen5.header_present = 1;
1931 GEN(&$$)->bits2.send_gen5.sfid = $3;
1932 GEN(&$$)->bits3.generic_gen5.header_present = ($13 != 0);
1942 GEN(&$$)->bits3.gen7_dp.category = $11;
1943 GEN(&$$)->bits3.gen7_dp.binding_table_index = $9;
1944 GEN(&$$)->bits3.gen7_dp.msg_control = $7;
1945 GEN(&$$)->bits3.gen7_dp.msg_type = $5;
1953 GEN(&$$)->bits3.gen6_dp.send_commit_msg = $11;
1954 GEN(&$$)->bits3.gen6_dp.binding_table_index = $9;
1955 GEN(&$$)->bits3.gen6_dp.msg_control = $7;
1956 GEN(&$$)->bits3.gen6_dp.msg_type = $5;
3090 GEN(instr)->header.opcode = opcode; in set_instruction_opcode()
3110 brw_set_dest(&genasm_compile, GEN(instr), *dest); in set_instruction_dest()
3123 reset_instruction_src_region(GEN(instr), src); in set_instruction_src0()
3135 brw_set_src0(&genasm_compile, GEN(instr), src->reg); in set_instruction_src0()
3147 reset_instruction_src_region(GEN(instr), src); in set_instruction_src1()
3159 brw_set_src1(&genasm_compile, GEN(instr), src->reg); in set_instruction_src1()
3168 brw_set_3src_dest(&genasm_compile, GEN(instr), *dest); in set_instruction_dest_three_src()
3176 reset_instruction_src_region(GEN(instr), src); in set_instruction_src0_three_src()
3181 brw_set_3src_src0(&genasm_compile, GEN(instr), src->reg); in set_instruction_src0_three_src()
3189 reset_instruction_src_region(GEN(instr), src); in set_instruction_src1_three_src()
3194 brw_set_3src_src1(&genasm_compile, GEN(instr), src->reg); in set_instruction_src1_three_src()
3202 reset_instruction_src_region(GEN(instr), src); in set_instruction_src2_three_src()
3207 brw_set_3src_src2(&genasm_compile, GEN(instr), src->reg); in set_instruction_src2_three_src()
3217 GEN(instr)->header.saturate = saturate; in set_instruction_saturate()
3232 GEN(instr)->header.access_mode = options.access_mode; in set_instruction_options()
3233 GEN(instr)->header.compression_control = options.compression_control; in set_instruction_options()
3234 GEN(instr)->header.thread_control = options.thread_control; in set_instruction_options()
3235 GEN(instr)->header.dependency_control = options.dependency_control; in set_instruction_options()
3236 GEN(instr)->header.mask_control = options.mask_control; in set_instruction_options()
3237 GEN(instr)->header.debug_control = options.debug_control; in set_instruction_options()
3238 GEN(instr)->header.acc_wr_control = options.acc_wr_control; in set_instruction_options()
3239 GEN(instr)->bits3.generic.end_of_thread = options.end_of_thread; in set_instruction_options()
3252 GEN(instr)->header.predicate_control = p->pred_control; in set_instruction_predicate()
3253 GEN(instr)->header.predicate_inverse = p->pred_inverse; in set_instruction_predicate()
3254 GEN(instr)->bits2.da1.flag_reg_nr = p->flag_reg_nr; in set_instruction_predicate()
3255 GEN(instr)->bits2.da1.flag_subreg_nr = p->flag_subreg_nr; in set_instruction_predicate()
3269 GEN(instr)->header.destreg__conditionalmod = c->cond; in set_instruction_pred_cond()
3286 GEN(instr)->bits2.da1.flag_reg_nr = c->flag_reg_nr; in set_instruction_pred_cond()
3287 GEN(instr)->bits2.da1.flag_subreg_nr = c->flag_subreg_nr; in set_instruction_pred_cond()
3323 return GEN(insn)->header.opcode; in instruction_opcode()
3365 GEN(insn)->bits3.break_cont.jip = jip; in set_branch_two_offsets()
3366 GEN(insn)->bits3.break_cont.uip = uip; in set_branch_two_offsets()
3381 GEN(insn)->bits3.JIP = jip; in set_branch_one_offset()
3383 GEN(insn)->bits3.break_cont.jip = jip; in set_branch_one_offset()
3387 GEN(insn)->bits3.JIP = jip; in set_branch_one_offset()
3389 GEN(insn)->bits1.branch_gen6.jump_count = jip; // for CASE,ELSE,FORK,IF,WHILE in set_branch_one_offset()
3391 GEN(insn)->bits3.JIP = jip; in set_branch_one_offset()
3394 … GEN(insn)->bits3.break_cont.uip = 1; // Set the istack pop count, which must always be 1. in set_branch_one_offset()