39 static uint32_t read_reg(uint32_t addr)  in read_reg()  function
257 		wm_linetime[pipe] = read_reg(0x45270 + pipe * 0x4);  in skl_wm_dump()
262 			plane_ctl[pipe][plane] = read_reg(addr + 0x80);  in skl_wm_dump()
263 			wm_trans[pipe][plane] = read_reg(addr + 0x00168);  in skl_wm_dump()
264 			buf_cfg[pipe][plane] = read_reg(addr + 0x0017C);  in skl_wm_dump()
266 				nv12_buf_cfg[pipe][plane] = read_reg(addr + 0x00178);  in skl_wm_dump()
271 				wm[level][pipe][plane] = read_reg(wm_offset);  in skl_wm_dump()
475 		dspcntr[i] = read_reg(0x70180 + i * 0x1000);  in ilk_wm_dump()
477 			spcntr[i] = read_reg(0x70280 + i * 0x1000);  in ilk_wm_dump()
479 			spcntr[i] = read_reg(0x72180 + i * 0x1000);  in ilk_wm_dump()
482 	wm_pipe[0] = read_reg(0x45100);  in ilk_wm_dump()
483 	wm_pipe[1] = read_reg(0x45104);  in ilk_wm_dump()
485 		wm_pipe[2] = read_reg(0x45200);  in ilk_wm_dump()
488 		wm_linetime[0] = read_reg(0x45270);  in ilk_wm_dump()
489 		wm_linetime[1] = read_reg(0x45274);  in ilk_wm_dump()
490 		wm_linetime[2] = read_reg(0x45278);  in ilk_wm_dump()
493 	wm_lp[0] = read_reg(0x45108);  in ilk_wm_dump()
494 	wm_lp[1] = read_reg(0x4510c);  in ilk_wm_dump()
495 	wm_lp[2] = read_reg(0x45110);  in ilk_wm_dump()
497 	wm_lp_spr[0] = read_reg(0x45120);  in ilk_wm_dump()
499 		wm_lp_spr[1] = read_reg(0x45124);  in ilk_wm_dump()
500 		wm_lp_spr[2] = read_reg(0x45128);  in ilk_wm_dump()
503 	arb_ctl = read_reg(0x45000);  in ilk_wm_dump()
504 	arb_ctl2 = read_reg(0x45004);  in ilk_wm_dump()
506 		wm_misc = read_reg(0x45260);  in ilk_wm_dump()
624 	dsparb = read_reg(0x70030);  in vlv_wm_dump()
625 	dsparb2 = read_reg(0x70060);  in vlv_wm_dump()
627 	fw1 = read_reg(0x70034);  in vlv_wm_dump()
628 	fw2 = read_reg(0x70038);  in vlv_wm_dump()
629 	fw3 = read_reg(0x7003c);  in vlv_wm_dump()
630 	fw4 = read_reg(0x70070);  in vlv_wm_dump()
631 	fw5 = read_reg(0x70074);  in vlv_wm_dump()
632 	fw6 = read_reg(0x70078);  in vlv_wm_dump()
634 	howm = read_reg(0x70064);  in vlv_wm_dump()
635 	howm1 = read_reg(0x70068);  in vlv_wm_dump()
637 	ddl1 = read_reg(0x70050);  in vlv_wm_dump()
638 	ddl2 = read_reg(0x70054);  in vlv_wm_dump()
640 	fw_blc_self = read_reg(0x6500);  in vlv_wm_dump()
641 	mi_arb = read_reg(0x6504);  in vlv_wm_dump()
642 	cbr1 = read_reg(0x70400);  in vlv_wm_dump()
645 		dsparb3 = read_reg(0x7006c);  in vlv_wm_dump()
647 		fw7 = read_reg(0x700b4);  in vlv_wm_dump()
648 		fw8 = read_reg(0x700b8);  in vlv_wm_dump()
649 		fw9 = read_reg(0x7007c);  in vlv_wm_dump()
651 		ddl3 = read_reg(0x70058);  in vlv_wm_dump()
656 		fw7 = read_reg(0x7007c);  in vlv_wm_dump()
840 	dspacntr = read_reg(0x70180);  in g4x_wm_dump()
841 	dspbcntr = read_reg(0x71180);  in g4x_wm_dump()
842 	dsparb = read_reg(0x70030);  in g4x_wm_dump()
843 	fw1 = read_reg(0x70034);  in g4x_wm_dump()
844 	fw2 = read_reg(0x70038);  in g4x_wm_dump()
845 	fw3 = read_reg(0x7003c);  in g4x_wm_dump()
846 	mi_display_power_down = read_reg(0x20e0);  in g4x_wm_dump()
847 	mi_arb_state = read_reg(0x20e4);  in g4x_wm_dump()
926 	dsparb = read_reg(0x70030);  in gen4_wm_dump()
927 	fw1 = read_reg(0x70034);  in gen4_wm_dump()
928 	fw2 = read_reg(0x70038);  in gen4_wm_dump()
929 	fw3 = read_reg(0x7003c);  in gen4_wm_dump()
930 	mi_display_power_down = read_reg(0x20e0);  in gen4_wm_dump()
931 	mi_arb_state = read_reg(0x20e4);  in gen4_wm_dump()
997 	dsparb = read_reg(0x70030);  in pnv_wm_dump()
998 	fw1 = read_reg(0x70034);  in pnv_wm_dump()
999 	fw2 = read_reg(0x70038);  in pnv_wm_dump()
1000 	fw3 = read_reg(0x7003c);  in pnv_wm_dump()
1001 	cbr = read_reg(0x70400);  in pnv_wm_dump()
1002 	mi_display_power_down = read_reg(0x20e0);  in pnv_wm_dump()
1003 	mi_arb_state = read_reg(0x20e4);  in pnv_wm_dump()
1087 	dsparb = read_reg(0x70030);  in gen3_wm_dump()
1088 	instpm = read_reg(0x20c0);  in gen3_wm_dump()
1089 	fw_blc = read_reg(0x20d8) | ((uint64_t)read_reg(0x20dc) << 32);  in gen3_wm_dump()
1090 	fw_blc_self = read_reg(0x20e0);  in gen3_wm_dump()
1091 	mi_arb_state = read_reg(0x20e4);  in gen3_wm_dump()
1156 	dsparb = read_reg(0x70030);  in gen2_wm_dump()
1157 	mem_mode = read_reg(0x20cc);  in gen2_wm_dump()
1158 	fw_blc = read_reg(0x20d8) | ((uint64_t)read_reg(0x20dc) << 32);  in gen2_wm_dump()
1159 	fw_blc_self = read_reg(0x20e0);  in gen2_wm_dump()
1160 	mi_state = read_reg(0x20e4);  in gen2_wm_dump()