Lines Matching refs:pm4
896 uint32_t *pm4; in amdgpu_bo_eviction_test() local
906 pm4 = calloc(pm4_dw, sizeof(*pm4)); in amdgpu_bo_eviction_test()
907 CU_ASSERT_NOT_EQUAL(pm4, NULL); in amdgpu_bo_eviction_test()
982 pm4[i++] = SDMA_PACKET_SI(SDMA_OPCODE_COPY_SI, 0, 0, 0, in amdgpu_bo_eviction_test()
984 pm4[i++] = 0xffffffff & bo2_mc; in amdgpu_bo_eviction_test()
985 pm4[i++] = 0xffffffff & bo1_mc; in amdgpu_bo_eviction_test()
986 pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; in amdgpu_bo_eviction_test()
987 pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; in amdgpu_bo_eviction_test()
989 pm4[i++] = SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0); in amdgpu_bo_eviction_test()
991 pm4[i++] = sdma_write_length - 1; in amdgpu_bo_eviction_test()
993 pm4[i++] = sdma_write_length; in amdgpu_bo_eviction_test()
994 pm4[i++] = 0; in amdgpu_bo_eviction_test()
995 pm4[i++] = 0xffffffff & bo1_mc; in amdgpu_bo_eviction_test()
996 pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; in amdgpu_bo_eviction_test()
997 pm4[i++] = 0xffffffff & bo2_mc; in amdgpu_bo_eviction_test()
998 pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; in amdgpu_bo_eviction_test()
1003 i, pm4, in amdgpu_bo_eviction_test()
1031 free(pm4); in amdgpu_bo_eviction_test()
1408 uint32_t *pm4; in amdgpu_command_submission_write_linear_helper_with_secure() local
1419 pm4 = calloc(pm4_dw, sizeof(*pm4)); in amdgpu_command_submission_write_linear_helper_with_secure()
1420 CU_ASSERT_NOT_EQUAL(pm4, NULL); in amdgpu_command_submission_write_linear_helper_with_secure()
1462 pm4[i++] = SDMA_PACKET_SI(SDMA_OPCODE_WRITE, 0, 0, 0, in amdgpu_command_submission_write_linear_helper_with_secure()
1465 pm4[i++] = SDMA_PACKET(SDMA_OPCODE_WRITE, in amdgpu_command_submission_write_linear_helper_with_secure()
1468 pm4[i++] = 0xfffffffc & bo_mc; in amdgpu_command_submission_write_linear_helper_with_secure()
1469 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_command_submission_write_linear_helper_with_secure()
1471 pm4[i++] = sdma_write_length - 1; in amdgpu_command_submission_write_linear_helper_with_secure()
1473 pm4[i++] = sdma_write_length; in amdgpu_command_submission_write_linear_helper_with_secure()
1475 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_write_linear_helper_with_secure()
1478 pm4[i++] = PACKET3(PACKET3_WRITE_DATA, 2 + sdma_write_length); in amdgpu_command_submission_write_linear_helper_with_secure()
1479 pm4[i++] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in amdgpu_command_submission_write_linear_helper_with_secure()
1480 pm4[i++] = 0xfffffffc & bo_mc; in amdgpu_command_submission_write_linear_helper_with_secure()
1481 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_command_submission_write_linear_helper_with_secure()
1483 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_write_linear_helper_with_secure()
1487 ip_type, ring_id, i, pm4, in amdgpu_command_submission_write_linear_helper_with_secure()
1498 memset((void*)pm4, 0, pm4_dw * sizeof(uint32_t)); in amdgpu_command_submission_write_linear_helper_with_secure()
1499 pm4[i++] = PACKET3(PACKET3_ATOMIC_MEM, 7); in amdgpu_command_submission_write_linear_helper_with_secure()
1505 pm4[i++] = (TC_OP_ATOMIC_CMPSWAP_RTN_32 | in amdgpu_command_submission_write_linear_helper_with_secure()
1509 pm4[i++] = 0xfffffffc & bo_mc; in amdgpu_command_submission_write_linear_helper_with_secure()
1510 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_command_submission_write_linear_helper_with_secure()
1511 pm4[i++] = 0x12345678; in amdgpu_command_submission_write_linear_helper_with_secure()
1512 pm4[i++] = 0x0; in amdgpu_command_submission_write_linear_helper_with_secure()
1513 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_write_linear_helper_with_secure()
1514 pm4[i++] = 0x0; in amdgpu_command_submission_write_linear_helper_with_secure()
1515 pm4[i++] = 0x100; in amdgpu_command_submission_write_linear_helper_with_secure()
1517 ip_type, ring_id, i, pm4, in amdgpu_command_submission_write_linear_helper_with_secure()
1523 memset((void*)pm4, 0, pm4_dw * sizeof(uint32_t)); in amdgpu_command_submission_write_linear_helper_with_secure()
1528 pm4[i++] = SDMA_PACKET(SDMA_OPCODE_ATOMIC, in amdgpu_command_submission_write_linear_helper_with_secure()
1533 pm4[i++] = 0xfffffffc & bo_mc; in amdgpu_command_submission_write_linear_helper_with_secure()
1534 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_command_submission_write_linear_helper_with_secure()
1535 pm4[i++] = 0x12345678; in amdgpu_command_submission_write_linear_helper_with_secure()
1536 pm4[i++] = 0x0; in amdgpu_command_submission_write_linear_helper_with_secure()
1537 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_write_linear_helper_with_secure()
1538 pm4[i++] = 0x0; in amdgpu_command_submission_write_linear_helper_with_secure()
1539 pm4[i++] = 0x100; in amdgpu_command_submission_write_linear_helper_with_secure()
1541 ip_type, ring_id, i, pm4, in amdgpu_command_submission_write_linear_helper_with_secure()
1560 memset((void*)pm4, 0, pm4_dw * sizeof(uint32_t)); in amdgpu_command_submission_write_linear_helper_with_secure()
1561 pm4[i++] = SDMA_PACKET(SDMA_OPCODE_ATOMIC, in amdgpu_command_submission_write_linear_helper_with_secure()
1566 pm4[i++] = 0xfffffffc & bo_mc; in amdgpu_command_submission_write_linear_helper_with_secure()
1567 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_command_submission_write_linear_helper_with_secure()
1568 pm4[i++] = 0x87654321; in amdgpu_command_submission_write_linear_helper_with_secure()
1569 pm4[i++] = 0x0; in amdgpu_command_submission_write_linear_helper_with_secure()
1570 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_write_linear_helper_with_secure()
1571 pm4[i++] = 0x0; in amdgpu_command_submission_write_linear_helper_with_secure()
1572 pm4[i++] = 0x100; in amdgpu_command_submission_write_linear_helper_with_secure()
1574 ip_type, ring_id, i, pm4, in amdgpu_command_submission_write_linear_helper_with_secure()
1591 free(pm4); in amdgpu_command_submission_write_linear_helper_with_secure()
1617 uint32_t *pm4; in amdgpu_command_submission_const_fill_helper() local
1627 pm4 = calloc(pm4_dw, sizeof(*pm4)); in amdgpu_command_submission_const_fill_helper()
1628 CU_ASSERT_NOT_EQUAL(pm4, NULL); in amdgpu_command_submission_const_fill_helper()
1666 pm4[i++] = SDMA_PACKET_SI(SDMA_OPCODE_CONSTANT_FILL_SI, in amdgpu_command_submission_const_fill_helper()
1669 pm4[i++] = 0xfffffffc & bo_mc; in amdgpu_command_submission_const_fill_helper()
1670 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_const_fill_helper()
1671 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 16; in amdgpu_command_submission_const_fill_helper()
1673 pm4[i++] = SDMA_PACKET(SDMA_OPCODE_CONSTANT_FILL, 0, in amdgpu_command_submission_const_fill_helper()
1675 pm4[i++] = 0xffffffff & bo_mc; in amdgpu_command_submission_const_fill_helper()
1676 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_command_submission_const_fill_helper()
1677 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_const_fill_helper()
1679 pm4[i++] = sdma_write_length - 1; in amdgpu_command_submission_const_fill_helper()
1681 pm4[i++] = sdma_write_length; in amdgpu_command_submission_const_fill_helper()
1686 pm4[i++] = PACKET3(PACKET3_DMA_DATA_SI, 4); in amdgpu_command_submission_const_fill_helper()
1687 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_const_fill_helper()
1688 pm4[i++] = PACKET3_DMA_DATA_SI_ENGINE(0) | in amdgpu_command_submission_const_fill_helper()
1692 pm4[i++] = 0xffffffff & bo_mc; in amdgpu_command_submission_const_fill_helper()
1693 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_command_submission_const_fill_helper()
1694 pm4[i++] = sdma_write_length; in amdgpu_command_submission_const_fill_helper()
1696 pm4[i++] = PACKET3(PACKET3_DMA_DATA, 5); in amdgpu_command_submission_const_fill_helper()
1697 pm4[i++] = PACKET3_DMA_DATA_ENGINE(0) | in amdgpu_command_submission_const_fill_helper()
1701 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_const_fill_helper()
1702 pm4[i++] = 0; in amdgpu_command_submission_const_fill_helper()
1703 pm4[i++] = 0xfffffffc & bo_mc; in amdgpu_command_submission_const_fill_helper()
1704 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_command_submission_const_fill_helper()
1705 pm4[i++] = sdma_write_length; in amdgpu_command_submission_const_fill_helper()
1711 i, pm4, in amdgpu_command_submission_const_fill_helper()
1731 free(pm4); in amdgpu_command_submission_const_fill_helper()
1750 uint32_t *pm4; in amdgpu_command_submission_copy_linear_helper() local
1760 pm4 = calloc(pm4_dw, sizeof(*pm4)); in amdgpu_command_submission_copy_linear_helper()
1761 CU_ASSERT_NOT_EQUAL(pm4, NULL); in amdgpu_command_submission_copy_linear_helper()
1815 pm4[i++] = SDMA_PACKET_SI(SDMA_OPCODE_COPY_SI, in amdgpu_command_submission_copy_linear_helper()
1818 pm4[i++] = 0xffffffff & bo2_mc; in amdgpu_command_submission_copy_linear_helper()
1819 pm4[i++] = 0xffffffff & bo1_mc; in amdgpu_command_submission_copy_linear_helper()
1820 pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; in amdgpu_command_submission_copy_linear_helper()
1821 pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; in amdgpu_command_submission_copy_linear_helper()
1823 pm4[i++] = SDMA_PACKET(SDMA_OPCODE_COPY, in amdgpu_command_submission_copy_linear_helper()
1827 pm4[i++] = sdma_write_length - 1; in amdgpu_command_submission_copy_linear_helper()
1829 pm4[i++] = sdma_write_length; in amdgpu_command_submission_copy_linear_helper()
1830 pm4[i++] = 0; in amdgpu_command_submission_copy_linear_helper()
1831 pm4[i++] = 0xffffffff & bo1_mc; in amdgpu_command_submission_copy_linear_helper()
1832 pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; in amdgpu_command_submission_copy_linear_helper()
1833 pm4[i++] = 0xffffffff & bo2_mc; in amdgpu_command_submission_copy_linear_helper()
1834 pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; in amdgpu_command_submission_copy_linear_helper()
1839 pm4[i++] = PACKET3(PACKET3_DMA_DATA_SI, 4); in amdgpu_command_submission_copy_linear_helper()
1840 pm4[i++] = 0xfffffffc & bo1_mc; in amdgpu_command_submission_copy_linear_helper()
1841 pm4[i++] = PACKET3_DMA_DATA_SI_ENGINE(0) | in amdgpu_command_submission_copy_linear_helper()
1846 pm4[i++] = 0xfffffffc & bo2_mc; in amdgpu_command_submission_copy_linear_helper()
1847 pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; in amdgpu_command_submission_copy_linear_helper()
1848 pm4[i++] = sdma_write_length; in amdgpu_command_submission_copy_linear_helper()
1850 pm4[i++] = PACKET3(PACKET3_DMA_DATA, 5); in amdgpu_command_submission_copy_linear_helper()
1851 pm4[i++] = PACKET3_DMA_DATA_ENGINE(0) | in amdgpu_command_submission_copy_linear_helper()
1855 pm4[i++] = 0xfffffffc & bo1_mc; in amdgpu_command_submission_copy_linear_helper()
1856 pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; in amdgpu_command_submission_copy_linear_helper()
1857 pm4[i++] = 0xfffffffc & bo2_mc; in amdgpu_command_submission_copy_linear_helper()
1858 pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; in amdgpu_command_submission_copy_linear_helper()
1859 pm4[i++] = sdma_write_length; in amdgpu_command_submission_copy_linear_helper()
1865 i, pm4, in amdgpu_command_submission_copy_linear_helper()
1889 free(pm4); in amdgpu_command_submission_copy_linear_helper()
2011 uint32_t *pm4 = NULL; in amdgpu_userptr_test() local
2023 pm4 = calloc(pm4_dw, sizeof(*pm4)); in amdgpu_userptr_test()
2024 CU_ASSERT_NOT_EQUAL(pm4, NULL); in amdgpu_userptr_test()
2057 pm4[i++] = SDMA_PACKET_SI(SDMA_OPCODE_WRITE, 0, 0, 0, in amdgpu_userptr_test()
2060 pm4[i++] = SDMA_PACKET(SDMA_OPCODE_WRITE, in amdgpu_userptr_test()
2062 pm4[i++] = 0xffffffff & bo_mc; in amdgpu_userptr_test()
2063 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_userptr_test()
2065 pm4[i++] = sdma_write_length - 1; in amdgpu_userptr_test()
2067 pm4[i++] = sdma_write_length; in amdgpu_userptr_test()
2070 pm4[i++] = 0xdeadbeaf; in amdgpu_userptr_test()
2073 pm4[0] = 0x0; in amdgpu_userptr_test()
2079 i, pm4, in amdgpu_userptr_test()
2088 free(pm4); in amdgpu_userptr_test()