414 void hme_evalsad_grid_npu_MxN_neon(err_prms_t *ps_prms)  in hme_evalsad_grid_npu_MxN_neon()  argument
416     S32 *pi4_sad = ps_prms->pi4_sad_grid;  in hme_evalsad_grid_npu_MxN_neon()
418     S32 x_off = ps_prms->i4_step;  in hme_evalsad_grid_npu_MxN_neon()
419     S32 y_off = ps_prms->i4_step * ps_prms->i4_ref_stride;  in hme_evalsad_grid_npu_MxN_neon()
421     assert((ps_prms->i4_part_mask & (ps_prms->i4_part_mask - 1)) == 0);  in hme_evalsad_grid_npu_MxN_neon()
425         if(ps_prms->i4_grid_mask & (1 << i))  in hme_evalsad_grid_npu_MxN_neon()
428     pi4_sad += (ps_prms->pi4_valid_part_ids[0] * grid_count);  in hme_evalsad_grid_npu_MxN_neon()
432         U08 *pu1_inp = ps_prms->pu1_inp;  in hme_evalsad_grid_npu_MxN_neon()
433         U08 *pu1_ref = ps_prms->pu1_ref;  in hme_evalsad_grid_npu_MxN_neon()
435         if(!(ps_prms->i4_grid_mask & (1 << i)))  in hme_evalsad_grid_npu_MxN_neon()
443             ps_prms->i4_inp_stride,  in hme_evalsad_grid_npu_MxN_neon()
444             ps_prms->i4_ref_stride,  in hme_evalsad_grid_npu_MxN_neon()
445             ps_prms->i4_blk_wd,  in hme_evalsad_grid_npu_MxN_neon()
446             ps_prms->i4_blk_ht);  in hme_evalsad_grid_npu_MxN_neon()
450 void hme_evalsad_pt_npu_MxN_8bit_neon(err_prms_t *ps_prms)  in hme_evalsad_pt_npu_MxN_8bit_neon()  argument
452     ps_prms->pi4_sad_grid[0] = ihevce_4mx4n_sad_computer_neon(  in hme_evalsad_pt_npu_MxN_8bit_neon()
453         ps_prms->pu1_inp,  in hme_evalsad_pt_npu_MxN_8bit_neon()
454         ps_prms->pu1_ref,  in hme_evalsad_pt_npu_MxN_8bit_neon()
455         ps_prms->i4_inp_stride,  in hme_evalsad_pt_npu_MxN_8bit_neon()
456         ps_prms->i4_ref_stride,  in hme_evalsad_pt_npu_MxN_8bit_neon()
457         ps_prms->i4_blk_wd,  in hme_evalsad_pt_npu_MxN_8bit_neon()
458         ps_prms->i4_blk_ht);  in hme_evalsad_pt_npu_MxN_8bit_neon()