435     ps_rc_quant->i1_qp_offset = ((ps_init_prms->s_tgt_lyr_prms.i4_internal_bit_depth - 8) * 6);  in ihevce_rc_mem_init()
440         MAX(-(ps_rc_quant->i1_qp_offset), ps_init_prms->s_config_prms.i4_min_frame_qp);  in ihevce_rc_mem_init()
738     f_temp = ((float)(ps_rc_quant->i2_max_qp + ps_rc_quant->i1_qp_offset - 4) / 6);  in ihevce_rc_init()
742     f_temp = ((float)(ps_rc_quant->i2_min_qp + ps_rc_quant->i1_qp_offset - 4) / 6);  in ihevce_rc_init()
747         ((float)(51 + ps_rc_quant->i1_qp_offset - 4) /  in ihevce_rc_init()
759     for(i = (0 - ps_rc_quant->i1_qp_offset); i <= 51; i++)  in ihevce_rc_init()
761         ps_rc_quant->pi4_qp_to_qscale_q_factor[i + ps_rc_quant->i1_qp_offset] =  in ihevce_rc_init()
763                 i + ps_rc_quant->i1_qp_offset, ps_rc_ctxt->u1_bit_depth);  in ihevce_rc_init()
764         ps_rc_quant->pi4_qp_to_qscale[i + ps_rc_quant->i1_qp_offset] =  in ihevce_rc_init()
765             ((ps_rc_quant->pi4_qp_to_qscale_q_factor[i + ps_rc_quant->i1_qp_offset] +  in ihevce_rc_init()
802                 ps_rc_ctxt->ps_rc_quant_ctxt->i1_qp_offset) <=  in ihevce_rc_init()
807                                                    ps_rc_ctxt->ps_rc_quant_ctxt->i1_qp_offset] +  in ihevce_rc_init()
847                 ps_rc_ctxt->ps_rc_quant_ctxt->i1_qp_offset) <= i4_max_qp)  in ihevce_rc_init()
851                                                    ps_rc_ctxt->ps_rc_quant_ctxt->i1_qp_offset] +  in ihevce_rc_init()
1030         I_frame_qp = I_frame_qp + ps_rc_ctxt->ps_rc_quant_ctxt->i1_qp_offset;  in ihevce_rc_init()
1392         i4_hevc_frame_qp = i4_hevc_frame_qp + ps_rc_ctxt->ps_rc_quant_ctxt->i1_qp_offset;  in ihevce_rc_get_bpp_based_frame_qp()
1505                     *pi4_scd_qp = *pi4_scd_qp + ps_rc_ctxt->ps_rc_quant_ctxt->i1_qp_offset;  in ihevce_rc_get_pre_enc_pic_quant()
1517         ASSERT(i4_hevc_frame_qp >= (-ps_rc_ctxt->ps_rc_quant_ctxt->i1_qp_offset));  in ihevce_rc_get_pre_enc_pic_quant()
1748     i4_hevc_qp = i4_hevc_qp + ps_ctxt->ps_rc_quant_ctxt->i1_qp_offset;  in ihevce_get_L0_est_satd_based_scd_qp()
1755                          ->i1_qp_offset))  // since outside RC the QP range is -12 to 51 for 10 bit  in ihevce_get_L0_est_satd_based_scd_qp()
1757         i4_hevc_qp = (SCD_MIN_HEVC_QP - ps_ctxt->ps_rc_quant_ctxt->i1_qp_offset);  in ihevce_get_L0_est_satd_based_scd_qp()
2806             if(ps_rc_lap_out->i4_L0_qp < 7 - ps_rc_ctxt->ps_rc_quant_ctxt->i1_qp_offset)  in ihevce_rc_get_pic_quant()
2807                 ps_rc_lap_out->i4_L0_qp = 7 - ps_rc_ctxt->ps_rc_quant_ctxt->i1_qp_offset;  in ihevce_rc_get_pic_quant()
3081         ASSERT(i4_hevc_frame_qp >= -ps_rc_ctxt->ps_rc_quant_ctxt->i1_qp_offset);  in ihevce_rc_get_pic_quant()
3215                 i4_hevc_frame_qp + ps_rc_ctxt->ps_rc_quant_ctxt->i1_qp_offset,  in ihevce_rc_get_pic_quant()
3675     i4_qscale = (ps_rc_quant_ctxt->pi4_qp_to_qscale[i4_frame_qp + ps_rc_quant_ctxt->i1_qp_offset] +  in ihevce_rc_get_scaled_mpeg2_qp()
4464                              [i4_avg_frame_hevc_qp + ps_rc_ctxt->ps_rc_quant_ctxt->i1_qp_offset];  in ihevce_rc_update_pic_info()
4516                         ps_rc_ctxt->ps_rc_quant_ctxt->i1_qp_offset;  in ihevce_rc_update_pic_info()
4519             CLIP3(i4_hevc_qp_rc, 1, MAX_HEVC_QP + ps_rc_ctxt->ps_rc_quant_ctxt->i1_qp_offset);  in ihevce_rc_update_pic_info()
4532         if(ps_rc_ctxt->ps_rc_quant_ctxt->i1_qp_offset != 0)  in ihevce_rc_update_pic_info()
4701         ps_rc_ctxt->ps_rc_quant_ctxt->i1_qp_offset,  in ihevce_rc_update_pic_info()
4845                              [i4_avg_frame_hevc_qp + ps_rc_ctxt->ps_rc_quant_ctxt->i1_qp_offset];  in ihevce_rc_interface_update()