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Lines Matching refs:Reg

72         unsigned Reg = *AI;  in StartBlock()  local
73 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in StartBlock()
74 KillIndices[Reg] = BBSize; in StartBlock()
75 DefIndices[Reg] = ~0u; in StartBlock()
86 unsigned Reg = *I; in StartBlock() local
87 if (!IsReturnBlock && !Pristine.test(Reg)) in StartBlock()
90 unsigned Reg = *AI; in StartBlock() local
91 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in StartBlock()
92 KillIndices[Reg] = BBSize; in StartBlock()
93 DefIndices[Reg] = ~0u; in StartBlock()
116 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
117 if (KillIndices[Reg] != ~0u) { in Observe()
121 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in Observe()
122 KillIndices[Reg] = Count; in Observe()
123 } else if (DefIndices[Reg] < InsertPosIndex && DefIndices[Reg] >= Count) { in Observe()
128 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in Observe()
132 DefIndices[Reg] = InsertPosIndex; in Observe()
187 Register Reg = MO.getReg(); in PrescanInstruction() local
188 if (Reg == 0) continue; in PrescanInstruction()
196 if (!Classes[Reg] && NewRC) in PrescanInstruction()
197 Classes[Reg] = NewRC; in PrescanInstruction()
198 else if (!NewRC || Classes[Reg] != NewRC) in PrescanInstruction()
199 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in PrescanInstruction()
202 for (MCRegAliasIterator AI(Reg, TRI, false); AI.isValid(); ++AI) { in PrescanInstruction()
209 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in PrescanInstruction()
214 if (Classes[Reg] != reinterpret_cast<TargetRegisterClass *>(-1)) in PrescanInstruction()
215 RegRefs.insert(std::make_pair(Reg, &MO)); in PrescanInstruction()
228 Classes[Reg] == reinterpret_cast<TargetRegisterClass *>(-1)) { in PrescanInstruction()
229 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in PrescanInstruction()
233 for (MCSuperRegIterator SuperRegs(Reg, TRI); in PrescanInstruction()
240 if (!KeepRegs.test(Reg)) { in PrescanInstruction()
241 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in PrescanInstruction()
282 Register Reg = MO.getReg(); in ScanInstruction() local
283 if (Reg == 0) continue; in ScanInstruction()
292 bool Keep = KeepRegs.test(Reg); in ScanInstruction()
296 for (MCSubRegIterator SRI(Reg, TRI, true); SRI.isValid(); ++SRI) { in ScanInstruction()
306 for (MCSuperRegIterator SR(Reg, TRI); SR.isValid(); ++SR) in ScanInstruction()
313 Register Reg = MO.getReg(); in ScanInstruction() local
314 if (Reg == 0) continue; in ScanInstruction()
323 if (!Classes[Reg] && NewRC) in ScanInstruction()
324 Classes[Reg] = NewRC; in ScanInstruction()
325 else if (!NewRC || Classes[Reg] != NewRC) in ScanInstruction()
326 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in ScanInstruction()
328 RegRefs.insert(std::make_pair(Reg, &MO)); in ScanInstruction()
332 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in ScanInstruction()
474 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies() local
475 if (KillIndices[Reg] == ~0u) in BreakAntiDependencies()
476 LLVM_DEBUG(dbgs() << " " << printReg(Reg, TRI)); in BreakAntiDependencies()
623 Register Reg = MO.getReg(); in BreakAntiDependencies() local
624 if (Reg == 0) continue; in BreakAntiDependencies()
625 if (MO.isUse() && TRI->regsOverlap(AntiDepReg, Reg)) { in BreakAntiDependencies()
629 if (MO.isDef() && Reg != AntiDepReg) in BreakAntiDependencies()
630 ForbidRegs.push_back(Reg); in BreakAntiDependencies()