543       LiveRegMap::iterator LRI = findLiveVirtReg(VirtReg);  in displacePhysReg()  local
544       assert(LRI != LiveVirtRegs.end() && "datastructures in sync");  in displacePhysReg()
547       reload(ReloadBefore, VirtReg, LRI->PhysReg);  in displacePhysReg()
549       setPhysRegState(LRI->PhysReg, regFree);  in displacePhysReg()
550       LRI->PhysReg = 0;  in displacePhysReg()
551       LRI->Reloaded = true;  in displacePhysReg()
579       LiveRegMap::iterator LRI = findLiveVirtReg(VirtReg);  in freePhysReg()  local
580       assert(LRI != LiveVirtRegs.end());  in freePhysReg()
581       LLVM_DEBUG(dbgs() << ' ' << printReg(LRI->VirtReg, TRI) << '\n');  in freePhysReg()
582       setPhysRegState(LRI->PhysReg, regFree);  in freePhysReg()
583       LRI->PhysReg = 0;  in freePhysReg()
796   LiveRegMap::const_iterator LRI = findLiveVirtReg(VirtReg);  in allocVirtRegUndef()  local
798   if (LRI != LiveVirtRegs.end() && LRI->PhysReg) {  in allocVirtRegUndef()
799     PhysReg = LRI->PhysReg;  in allocVirtRegUndef()
820   LiveRegMap::iterator LRI = findLiveVirtReg(VirtReg);  in defineLiveThroughVirtReg()  local
821   if (LRI != LiveVirtRegs.end()) {  in defineLiveThroughVirtReg()
822     MCPhysReg PrevReg = LRI->PhysReg;  in defineLiveThroughVirtReg()
827       LRI->PhysReg = 0;  in defineLiveThroughVirtReg()
828       allocVirtReg(MI, *LRI, 0, true);  in defineLiveThroughVirtReg()
831       LLVM_DEBUG(dbgs() << "Copy " << printReg(LRI->PhysReg, TRI) << " to "  in defineLiveThroughVirtReg()
835         .addReg(LRI->PhysReg, llvm::RegState::Kill);  in defineLiveThroughVirtReg()
839       LRI->LastUse = &MI;  in defineLiveThroughVirtReg()
854   LiveRegMap::iterator LRI;  in defineVirtReg()  local
856   std::tie(LRI, New) = LiveVirtRegs.insert(LiveReg(VirtReg));  in defineVirtReg()
860         LRI->LiveOut = true;  in defineVirtReg()
867   if (LRI->PhysReg == 0)  in defineVirtReg()
868     allocVirtReg(MI, *LRI, 0, LookAtPhysRegUses);  in defineVirtReg()
870     assert(!isRegUsedInInstr(LRI->PhysReg, LookAtPhysRegUses) &&  in defineVirtReg()
874                       << printReg(LRI->PhysReg, TRI) << '\n');  in defineVirtReg()
877   MCPhysReg PhysReg = LRI->PhysReg;  in defineVirtReg()
879   if (LRI->Reloaded || LRI->LiveOut) {  in defineVirtReg()
883       LLVM_DEBUG(dbgs() << "Spill Reason: LO: " << LRI->LiveOut << " RL: "  in defineVirtReg()
884                         << LRI->Reloaded << '\n');  in defineVirtReg()
885       bool Kill = LRI->LastUse == nullptr;  in defineVirtReg()
886       spill(SpillBefore, VirtReg, PhysReg, Kill, LRI->LiveOut);  in defineVirtReg()
887       LRI->LastUse = nullptr;  in defineVirtReg()
889     LRI->LiveOut = false;  in defineVirtReg()
890     LRI->Reloaded = false;  in defineVirtReg()
901   LiveRegMap::iterator LRI;  in useVirtReg()  local
903   std::tie(LRI, New) = LiveVirtRegs.insert(LiveReg(VirtReg));  in useVirtReg()
908         LRI->LiveOut = true;  in useVirtReg()
915     assert((!MO.isKill() || LRI->LastUse == &MI) && "Invalid kill flag");  in useVirtReg()
919   if (LRI->PhysReg == 0) {  in useVirtReg()
927     allocVirtReg(MI, *LRI, Hint, false);  in useVirtReg()
928     if (LRI->Error) {  in useVirtReg()
936   LRI->LastUse = &MI;  in useVirtReg()
937   markRegUsedInInstr(LRI->PhysReg);  in useVirtReg()
938   setPhysReg(MI, MO, LRI->PhysReg);  in useVirtReg()
1244         for (LiveRegMap::iterator LRI = LiveVirtRegs.begin(),  in allocateInstruction()  local
1245              LRIE = LiveVirtRegs.end(); LRI != LRIE; ++LRI) {  in allocateInstruction()
1246           MCPhysReg PhysReg = LRI->PhysReg;  in allocateInstruction()
1373   LiveRegMap::iterator LRI = findLiveVirtReg(Reg);  in handleDebugValue()  local
1374   if (LRI != LiveVirtRegs.end() && LRI->PhysReg) {  in handleDebugValue()
1375     setPhysReg(MI, MO, LRI->PhysReg);  in handleDebugValue()