428   SrcIdx = DstIdx = 0;  in setRegisters()
476                                          SrcIdx, DstIdx);  in setRegisters()
481       SrcIdx = DstSub;  in setRegisters()
498     if (DstIdx && !SrcIdx) {  in setRegisters()
500       std::swap(SrcIdx, DstIdx);  in setRegisters()
519   std::swap(SrcIdx, DstIdx);  in flip()
544     assert(!DstIdx && !SrcIdx && "Inconsistent CoalescerPair state.");  in isCoalescable()
558     return TRI.composeSubRegIndices(SrcIdx, SrcSub) ==  in isCoalescable()
1252   unsigned SrcIdx = CP.isFlipped() ? CP.getDstIdx() : CP.getSrcIdx();  in reMaterializeTrivialDef()  local
1295   if (SrcIdx && DstIdx)  in reMaterializeTrivialDef()
1324   TII->reMaterialize(*MBB, MII, DstReg, SrcIdx, *DefMI, *TRI);  in reMaterializeTrivialDef()
1337       assert(SrcIdx == 0 && CP.isFlipped()  in reMaterializeTrivialDef()
1825     unsigned SrcIdx = CP.getSrcIdx();  in joinCopy()  local
1828       std::swap(SrcIdx, DstIdx);  in joinCopy()
1831     if (!TRI->shouldCoalesce(CopyMI, SrcRC, SrcIdx, DstRC, DstIdx,  in joinCopy()
3414     unsigned SrcIdx = CP.getSrcIdx();  in joinVirtRegs()  local
3416       LaneBitmask Mask = SrcIdx == 0 ? CP.getNewRC()->getLaneMask()  in joinVirtRegs()
3417                                      : TRI->getSubRegIndexLaneMask(SrcIdx);  in joinVirtRegs()
3422         LaneBitmask Mask = TRI->composeSubRegIndexLaneMask(SrcIdx, R.LaneMask);  in joinVirtRegs()