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Lines Matching refs:ResultReg

627       Register ResultReg =  in selectBinaryOp()  local
630 if (!ResultReg) in selectBinaryOp()
634 updateValueMap(I, ResultReg); in selectBinaryOp()
661 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp() local
663 if (!ResultReg) in selectBinaryOp()
667 updateValueMap(I, ResultReg); in selectBinaryOp()
677 Register ResultReg = fastEmit_rr(VT.getSimpleVT(), VT.getSimpleVT(), in selectBinaryOp() local
679 if (!ResultReg) in selectBinaryOp()
685 updateValueMap(I, ResultReg); in selectBinaryOp()
961 CLI.ResultReg = createResultReg(TLI.getRegClassFor(MVT::i64)); in selectPatchpoint()
963 Ops.push_back(MachineOperand::CreateReg(CLI.ResultReg, /*isDef=*/true)); in selectPatchpoint()
1056 updateValueMap(I, CLI.ResultReg, CLI.NumResultRegs); in selectPatchpoint()
1264 updateValueMap(CLI.CB, CLI.ResultReg, CLI.NumResultRegs); in lowerCallTo()
1502 Register ResultReg = getRegForValue(II->getArgOperand(0)); in selectIntrinsicCall() local
1503 if (!ResultReg) in selectIntrinsicCall()
1505 updateValueMap(II, ResultReg); in selectIntrinsicCall()
1561 Register ResultReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), in selectCast() local
1563 if (!ResultReg) in selectCast()
1566 updateValueMap(I, ResultReg); in selectCast()
1596 Register ResultReg; in selectBitCast() local
1602 ResultReg = createResultReg(DstClass); in selectBitCast()
1604 TII.get(TargetOpcode::COPY), ResultReg).addReg(Op0); in selectBitCast()
1609 if (!ResultReg) in selectBitCast()
1610 ResultReg = fastEmit_r(SrcVT, DstVT, ISD::BITCAST, Op0, Op0IsKill); in selectBitCast()
1612 if (!ResultReg) in selectBitCast()
1615 updateValueMap(I, ResultReg); in selectBitCast()
1632 Register ResultReg = createResultReg(TyRegClass); in selectFreeze() local
1634 TII.get(TargetOpcode::COPY), ResultReg).addReg(Reg); in selectFreeze()
1636 updateValueMap(I, ResultReg); in selectFreeze()
1785 Register ResultReg = fastEmit_r(VT.getSimpleVT(), VT.getSimpleVT(), ISD::FNEG, in selectFNeg() local
1787 if (ResultReg) { in selectFNeg()
1788 updateValueMap(I, ResultReg); in selectFNeg()
1811 ResultReg = fastEmit_r(IntVT.getSimpleVT(), VT.getSimpleVT(), ISD::BITCAST, in selectFNeg()
1813 if (!ResultReg) in selectFNeg()
1816 updateValueMap(I, ResultReg); in selectFNeg()
1838 unsigned ResultReg; in selectExtractValue() local
1841 ResultReg = I->second; in selectExtractValue()
1843 ResultReg = FuncInfo.InitializeRegForValue(Op0); in selectExtractValue()
1854 ResultReg += TLI.getNumRegisters(FuncInfo.Fn->getContext(), AggValueVTs[i]); in selectExtractValue()
1856 updateValueMap(EVI, ResultReg); in selectExtractValue()
2060 Register ResultReg = fastEmit_ri(VT, VT, Opcode, Op0, Op0IsKill, Imm); in fastEmit_ri_() local
2061 if (ResultReg) in fastEmit_ri_()
2062 return ResultReg; in fastEmit_ri_()
2107 Register ResultReg = createResultReg(RC); in fastEmitInst_() local
2110 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg); in fastEmitInst_()
2111 return ResultReg; in fastEmitInst_()
2119 Register ResultReg = createResultReg(RC); in fastEmitInst_r() local
2123 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg) in fastEmitInst_r()
2129 TII.get(TargetOpcode::COPY), ResultReg).addReg(II.ImplicitDefs[0]); in fastEmitInst_r()
2132 return ResultReg; in fastEmitInst_r()
2141 Register ResultReg = createResultReg(RC); in fastEmitInst_rr() local
2146 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg) in fastEmitInst_rr()
2154 TII.get(TargetOpcode::COPY), ResultReg).addReg(II.ImplicitDefs[0]); in fastEmitInst_rr()
2156 return ResultReg; in fastEmitInst_rr()
2166 Register ResultReg = createResultReg(RC); in fastEmitInst_rrr() local
2172 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg) in fastEmitInst_rrr()
2182 TII.get(TargetOpcode::COPY), ResultReg).addReg(II.ImplicitDefs[0]); in fastEmitInst_rrr()
2184 return ResultReg; in fastEmitInst_rrr()
2192 Register ResultReg = createResultReg(RC); in fastEmitInst_ri() local
2196 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg) in fastEmitInst_ri()
2204 TII.get(TargetOpcode::COPY), ResultReg).addReg(II.ImplicitDefs[0]); in fastEmitInst_ri()
2206 return ResultReg; in fastEmitInst_ri()
2215 Register ResultReg = createResultReg(RC); in fastEmitInst_rii() local
2219 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg) in fastEmitInst_rii()
2229 TII.get(TargetOpcode::COPY), ResultReg).addReg(II.ImplicitDefs[0]); in fastEmitInst_rii()
2231 return ResultReg; in fastEmitInst_rii()
2239 Register ResultReg = createResultReg(RC); in fastEmitInst_f() local
2242 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg) in fastEmitInst_f()
2248 TII.get(TargetOpcode::COPY), ResultReg).addReg(II.ImplicitDefs[0]); in fastEmitInst_f()
2250 return ResultReg; in fastEmitInst_f()
2259 Register ResultReg = createResultReg(RC); in fastEmitInst_rri() local
2264 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg) in fastEmitInst_rri()
2274 TII.get(TargetOpcode::COPY), ResultReg).addReg(II.ImplicitDefs[0]); in fastEmitInst_rri()
2276 return ResultReg; in fastEmitInst_rri()
2281 Register ResultReg = createResultReg(RC); in fastEmitInst_i() local
2285 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg) in fastEmitInst_i()
2290 TII.get(TargetOpcode::COPY), ResultReg).addReg(II.ImplicitDefs[0]); in fastEmitInst_i()
2292 return ResultReg; in fastEmitInst_i()
2297 Register ResultReg = createResultReg(TLI.getRegClassFor(RetVT)); in fastEmitInst_extractsubreg() local
2303 ResultReg).addReg(Op0, getKillRegState(Op0IsKill), Idx); in fastEmitInst_extractsubreg()
2304 return ResultReg; in fastEmitInst_extractsubreg()